K6X1008C2D-PF55 Samsung, K6X1008C2D-PF55 Datasheet

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K6X1008C2D-PF55

Manufacturer Part Number
K6X1008C2D-PF55
Description
Manufacturer
Samsung
Datasheet

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K6X1008C2D-PF55
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K6X1008C2D-PF55
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K6X1008C2D Family
Document Title
Revision History
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and
Revision No.
128Kx8 bit Low Power CMOS Static RAM
0.0
0.1
0.2
0.3
1.0
History
Initial draft
Revised
- Deleted 32-TSOP1-0820R Package Type.
- Added Commercial product.
Revised
- Added Lead Free 32-SOP-525 Product
Revised
- Added Lead Free 32-TSOP1-0820F Product
Finalized
- Changed I
- Changed I
- Changed I
- Changed I
- Changed I
CC
CC
SB
DR
DR
2 from 35mA to 25mA
(industrial)
(Automotive)
from 3mA to 0.4mA
from 10mA to 5mA
from 15 A to 10 A
from 25 A to 20 A
1
Draft Data
July 15, 2002
December 4, 2002
May 13, 2003
June 21, 2003
September 16, 2003
CMOS SRAM
September 2003
Remark
Preliminary
Preliminary
Preliminary
Preliminary
Final
Revision 1.0

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K6X1008C2D-PF55 Summary of contents

Page 1

... K6X1008C2D Family Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History 0.0 Initial draft 0.1 Revised - Deleted 32-TSOP1-0820R Package Type. - Added Commercial product. 0.2 Revised - Added Lead Free 32-SOP-525 Product 0.3 Revised - Added Lead Free 32-TSOP1-0820F Product 1.0 Finalized - Changed I from 10mA to 5mA ...

Page 2

... No Connection SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. GENERAL DESCRIPTION The K6X1008C2D families are fabricated by SAMSUNG s advanced CMOS process technology. The families support verious operating temperature ranges and have various pack- age types for user flexibility of system design. The families also support low data retention voltage for battery back-up operation with low data retention current ...

Page 3

... LL K6X1008C2D-DF70 32-DIP, 70ns, LL K6X1008C2D-GF55 32-SOP, 55ns, LL K6X1008C2D-GF70 32-SOP, 70ns K6X1008C2D-BF55 32-SOP, 55ns K6X1008C2D-BF70 32-SOP, 70ns, LL K6X1008C2D-TF55 32-TSOP-F, 55ns, LL K6X1008C2D-TF70 32-TSOP-F, 70ns K6X1008C2D-PF55 32-TSOP-F, 55ns K6X1008C2D-PF70 32-TSOP-F, 70ns I/O 1) High High High-Z H Dout L Din ...

Page 4

... K6X1008C2D Family RECOMMENDED DC OPERATING CONDITIONS Item Supply voltage Ground Input high voltage Input low voltage Note: 1. Commercial Product Otherwise specified A Industrial Product Otherwise specified A Automotive Product: T =-40 to 125 C, Otherwise specified A 2. Overshoot: Vcc+3.0V in case of pulse width 30ns. ...

Page 5

... K6X1008C2D Family AC OPERATING CONDITIONS TEST CONDITIONS ( Test Load and Input/Output Reference) Input pulse level: 0.8 to 2.4V Input rising and falling time: 5ns Input and output reference voltage:1.5V Output load(see right): C =100pF+1TTL L C =50pF+1TTL L AC CHARACTERISTICS (V =4.5~5.5V, Commercial product Industrial product Parameter List ...

Page 6

... K6X1008C2D Family TIMING DIAGRAMS TIMING WAVEFORM OF READ CYCLE(1) Address Data Out Previous Data Valid TIMING WAVEFORM OF READ CYCLE(2) Address High-Z Data out NOTES (READ CYCLE and are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage ...

Page 7

... K6X1008C2D Family TIMING WAVEFORM OF WRITE CYCLE(1) Address Data in Data Undefined Data out TIMING WAVEFORM OF WRITE CYCLE(2) Address Data in Data out (WE Controlled CW( CW(2) t WP(1) t AS( Data Valid t WHZ (CS Controlled CW(2) AS( WP( Data Valid ...

Page 8

... K6X1008C2D Family TIMING WAVEFORM OF WRITE CYCLE(3) Address Data in Data out NOTES (WRITE CYCLE write occurs during the overlap of a low CS CS going high and WE going low: A write end at the earliest transition among measured from the begining of write to the end of write. ...

Page 9

... K6X1008C2D Family PACKAGE DIMENSIONS 32 DUAL INLINE PACKAGE (600mil) #32 13.60 0.20 0.535 0.008 #1 1. 0.075 32 PLASTIC SMALL OUTLINE PACKAGE (525mil) #32 #1 20.87 0.822 20.47 0.806 +0.100 0.41 -0.050 0. +0.004 0.016 0.028 -0.002 42.31 MAX 1.666 41.91 0.20 1.650 0.008 0.46 0.10 0.018 0.004 1.52 2.54 0.10 0.060 0.100 0.004 #17 14.12 0.30 0.556 0.012 #16 2.74 0.20 MAX 0.108 0.008 3.00 0.118 0.20 0.008 1 ...

Page 10

... K6X1008C2D Family PACKAGE DIMENSIONS 32 PIN THIN SMALL OUTLINE PACKAGE TYPE I (0820F) +0.10 0.20 -0.05 +0.004 0.008 -0.002 #1 0.50 0.0197 #16 0.25 TYP 0.010 0~8 0.45 ~0.75 0.018 ~0.030 20.00 0.20 0.787 0.008 18.40 0.10 0.724 0.004 10 CMOS SRAM Units: millimeters(inches) #32 0. 0.010 8.40 MAX 0.331 #17 1.00 0.05 0.10 MIN 0.039 0.002 0.004 1.20 MAX 0.047 +0.10 0.15 -0.05 +0.004 0.006 -0.002 0. 0.020 Revision 1.0 ...

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