MBM29LV400TC-70PFTN Fujitsu, MBM29LV400TC-70PFTN Datasheet

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MBM29LV400TC-70PFTN

Manufacturer Part Number
MBM29LV400TC-70PFTN
Description
Manufacturer
Fujitsu
Datasheet

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FUJITSU SEMICONDUCTOR
FLASH MEMORY
CMOS
4M (512K
MBM29LV400TC
Embedded Erase
FEATURES
• Single 3.0 V read, program, and erase
• Compatible with JEDEC-standard commands
• Compatible with JEDEC-standard world-wide pinouts
• Minimum 100,000 program/erase cycles
• High performance
• Sector erase architecture
• Boot Code Sector Architecture
• Embedded Erase
• Embedded Program
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
• Automatic sleep mode
• Low V
• Erase Suspend/Resume
DATA SHEET
Minimizes system level power requirements
Uses same software commands as E
48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
44-pin SOP (Package suffix: PF)
48-pin CSOP (Package suffix: PCV)
48-ball FBGA (Package suffix: PBT)
70 ns maximum access time
One 8K word, two 4K words, one 16K word, and seven 32K words sectors in word mode
One 16K byte, two 8K bytes, one 32K byte, and seven 64K bytes sectors in byte mode
Any combination of sectors can be concurrently erased. Also supports full chip erase
T = Top sector
B = Bottom sector
Automatically preprograms and erases the chip or any sector
Automatically writes and verifies data at specified address
Hardware method for detection of program or erase cycle completion
When addresses remain stable, automatically switch themselves to low power mode
Suspends the erase operation to allow a read in another sector within the same device
CC
TM
write inhibit
and Embedded Program
TM
Algorithms
TM
Algorithms
2.5 V
TM
-70/-90/-12
are trademarks of Advanced Micro Devices, Inc.
2
PROMs
8/256K
/MBM29LV400BC
16) BIT
-70/-90/-12
DS05-20862-3E
(Continued)

Related parts for MBM29LV400TC-70PFTN

MBM29LV400TC-70PFTN Summary of contents

Page 1

... FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 4M (512K MBM29LV400TC FEATURES • Single 3.0 V read, program, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E • Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) ...

Page 2

... MBM29LV400TC (Continued) • Sector protection Hardware method disables any combination of sectors from program or erase operations • Sector Protection set function by Extended sector Protect command • Temporary sector unprotection Temporary sector unprotection via the RESET pin PACKAGES 48-pin plastic TSOP (I) Marking Side ...

Page 3

... The MBM29LV400TC/BC are a 8M-bit, 3.0 V-only Flash memory organized as 512K bytes of 8 bits each or 256K words of 16 bits each. The MBM29LV400TC/BC are offered in a 48-pin TSOP(I), 44-pin SOP , 48-pin CSOP , and 48-ball FBGA packages. These devices are designed to be programmed in-system with the standard system 3 ...

Page 4

... MBM29LV400TC Sector Architecture 4 /MBM29LV400BC -70/-90/-12 ( 16) 3FFFFH 64K byte 3DFFFH 64K byte 3CFFFH 64K byte 3BFFFH 64K byte 37FFFH 64K byte ...

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... State BYTE Control RESET Command Register CE OE Low V Detector /MBM29LV400BC -70/-90/-12 MBM29LV400TC/MBM29LV400BC +0.3 V -70 –0.3 V +0.6 V — –0 RY/BY Erase Voltage Generator Program Voltage Chip Enable Generator Output Enable Logic Y-Decoder STB Timer for Address Program/Erase ...

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... FPT-48P-M19 A 24 (Marking Side N.C. 16 RY/BY 15 N.C. 14 N.C. MBM29LV400TC/MBM29LV400BC 13 RESET 12 Reverse Pinout WE 11 N. FPT-48P-M20 6 /MBM29LV400BC -70/-90/-12 TSOP(I) A ...

Page 7

... MBM29LV400TC (Continued N.C. RY/BY N.C. N.C. RESET WE N.C. N. ...

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... MBM29LV400TC LOGIC SYMBOL RESET RY/BY BYTE 8 /MBM29LV400BC -70/-90/-12 Table 1 MBM29LV400TC/400BC Pin Configuration Pin Address Inputs - Data Inputs/Outputs Chip Enable OE Output Enable Write Enable RY/BY Ready/Busy Output Hardware Reset Pin/Temporary Sector ...

Page 9

... Standby Output Disable Write (Program/Erase) Enable Sector Protection (2), (4) Verify Sector Protection (2), (4) Temporary Sector Unprotection Reset (Hardware)/Standby Table 3 MBM29LV400TC/400BC User Bus Operations (BYTE = V Operation Auto-Select Manufacturer Code (1) Auto-Select Device Code (1) Read (3) Standby Output Disable Write (Program/Erase) Enable Sector Protection (2), (4) ...

Page 10

... MBM29LV400TC ORDERING INFORMATION Standard Products Fujitsu standard products are available in several packages. The order number is formed by a combination of: MBM29LV400 T C -70 DEVICE NUMBER/DESCRIPTION MBM29LV400 4Mega-bit (512K 3.0 V-only Read, Program, and Erase 10 /MBM29LV400BC -70/-90/-12 PFTN PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package PFTR = 48-Pin Thin Small Outline Package ...

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... FUNCTIONAL DESCRIPTION Read Mode The MBM29LV400TC/BC have two control functions which must be satisfied in order to obtain data at the outputs the power control and should be used for a device selection the output control and should be used to gate data to the output pins if a device is selected. ...

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... MBM29LV400TC The manufacturer and device codes may also be read via the command register, for instances when the MBM29LV400TC/BC are erased or programmed in a system without access to high voltage on the A command sequence is illustrated in Table 7. (Refer to Autoselect Command section.) Byte represents the manufacturer’s code (Fujitsu = 04H) and (A ...

Page 13

... Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters. Sector Protection The MBM29LV400TC/BC feature hardware sector protection. This feature will disable both program and erase operations in any number of sectors (0 through 10). The sector protection feature is enabled using programming equipment at the user’s site. The devices are shipped with all sectors unprotected. Alternatively, Fujitsu may program and protect sectors in the factory prior to shiping the device ...

Page 14

... MBM29LV400TC RESET Hardware Reset The MBM29LV400TC/BC devices may be reset by driving the RESET pin to V requirement and has to be kept low (V Any operation in the process of being executed will be terminated and the internal state machine will be reset to the read mode 20 s after the RESET pin is driven low. Furthermore, once the RESET pin goes high, the devices require an additional the standby mode for the duration of the pulse and all the data output pins will be tri-stated ...

Page 15

... MBM29LV400TC Table 5 Sector Address Tables (MBM29LV400TC) Sector Address SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 ...

Page 16

... MBM29LV400TC Table 6 Sector Address SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 0 SA5 0 1 SA6 0 1 SA7 1 0 SA8 1 0 SA9 1 1 SA10 /MBM29LV400BC -70/-90/-12 Sector Address Tables (MBM29LV400BC Address Range ( 00000H to 03FFFH ...

Page 17

... MBM29LV400TC Table 7 MBM29LV400TC/400BC Standard Command Definitions First Bus Bus Command Write Cycle Write Sequence Cycles Req’d Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Word 1 XXXH F0H Read/Reset Byte 555H Word 3 AAH Read/Reset AAAH Byte Word ...

Page 18

... Standard microprocessor read cycles will retrieve array data. This default value ensures that no spurious alteration of the memory content occurs during the power transition. Refer to the AC Read Characteristics and Waveforms for the specific timing parameters. 18 /MBM29LV400BC -70/-90/-12 MBM29LV400TC/BC Extended Command Definitions First Bus Second Bus Write Cycle Write Cycle Addr ...

Page 19

... Following the command write, a read cycle from address XX00H retrieves the manufacture code of 04H. A read cycle from address XX01H for 16(XX02H for 8) returns the device code (MBM29LV400TC = B9H and MBM29LV400BC = BAH for 8 mode; MBM29LV400TC = 22B9H and MBM29LV400BC = 22BAH for 16 mode). (See Tables 4.1 and 4.2.) All manufacturer and device codes will exhibit odd parity with DQ bit ...

Page 20

... MBM29LV400TC Chip Erase Chip erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the “set-up” command. Two more “unlock” write cycles are then followed by the chip erase command. Chip erase does not require the user to program the device prior to erase. Upon executing the Embedded Erase Algorithm command sequence the devices will automatically program and verify the entire memory for an all zero data pattern prior to electrical erase (Preprogram function) ...

Page 21

... MBM29LV400TC Erase Suspend The Erase Suspend command allows the user to interrupt a Sector Erase operation and then perform data reads from or programs to a sector not being erased. This command is applicable ONLY during the Sector Erase operation which includes the time-out period for sector erase. The Erase Suspend command will be ignored if written during the Chip Erase operation or Embedded Program Algorithm ...

Page 22

... Algorithm is executed by writing program set-up command (A0H) and data write cycles (PA/PD). (Refer to the Figure 27 Extended algorithm.) (3) Extended Sector Protection In addition to normal sector protection, the MBM29LV400TC/BC has Extended Sector Protection as extended function. This function enable to protect sector by forcing V Unlike conventional procedure not necessary to force V RESET pin requires V for sector protection in this mode ...

Page 23

... MBM29LV400TC Write Operation Status Status Embedded Program Algorithm Embedded Erase Algorithm Erase Suspend Read (Erase Suspended Sector) In Progress Erase Erase Suspend Read Suspended (Non-Erase Suspended Sector) Mode Erase Suspend Program (Non-Erase Suspended Sector) Embedded Program Algorithm Embedded Erase Algorithm Exceeded Time Limits ...

Page 24

... DQ 6 Toggle Bit I The MBM29LV400TC/BC also feature the “Toggle Bit I” method to indicate to the host system that the Embedded Algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from the devices will result in DQ toggling between one and zero ...

Page 25

... MBM29LV400TC DQ 5 Exceeded Timing Limits DQ will indicate if the program or erase time has exceeded the specified limits (internal pulse count). Under 5 these conditions DQ will produce a “1”. This is a failure condition which indicates that the program or erase 5 cycle was not successfully completed. Data Polling is the only operating function of the devices under this condition ...

Page 26

... RY/BY Ready/Busy The MBM29LV400TC/BC provide a RY/BY open-drain output pin as a way to indicate to the host system that the Embedded Algorithms are either in progress or has been completed. If the output is low, the devices are busy with either a program or erase operation. If the output is high, the devices are ready to accept any read/ write or erase operation ...

Page 27

... MBM29LV400TC Low V Write Inhibit CC To avoid initiation of a write cycle during V than 2.3 V (typically 2.4 V < are disabled. Under this condition the device will reset to the read mode. Subsequent writes will be ignored until the V level is greater than the users responsibility to ensure that the control pins are logically correct ...

Page 28

... Supply Voltages CC MBM29LV400TC/BC-70........................................................................................ +3 +3.6 V MBM29LV400TC/BC-90/-12................................................................................. +2 +3.6 V Operating ranges define those limits between which the functionality of the devices are guaranteed. WARNING: The recommended operating conditions are required in to ensure the normal operation of ranges for the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges ...

Page 29

... MBM29LV400TC MAXIMUM OVERSHOOT +0.6 V –0.5 V –2.0 V Figure +2.0 V Figure 2 Maximum Positive Overshoot Waveform 1 +14.0 V +13 +0 This waveform is applied for A Figure 3 Maximum Positive Overshoot Waveform 2 /MBM29LV400BC -70/-90/- Maximum Negative Overshoot Waveform OE, and RESET ...

Page 30

... MBM29LV400TC DC CHARACTERISTICS Parameter Parameter Description Symbol I Input Leakage Current LI I Output Leakage Current OE, RESET Inputs Leakage 9 I LIT Current I V Active Current (Note 1) CC1 Active Current (Note 2) CC2 Current (Standby) CC3 Current (Standby, Reset) CC4 CC V Current ...

Page 31

... CE or BYTE Switching Low or ELFL — t High ELFH Note: Test Conditions: Output Load: 1 TTL gate and 30 pF (MBM29LV400TC/BC-70) 1 TTL gate and 100 pF (MBM29LV400TC/BC-90/-12) Input rise and fall times Input pulse levels: 0 3.0 V Timing measurement reference level Input: 1.5 V Output:1.5 V Notes including jig capacitance (MBM29LV400TC/BC-70) ...

Page 32

... Toggle and Data Polling Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Typ. Typ. Min. (Note 2) Min. ID Min. Min. Min. Min. Min. Min. Min. -70/-90/-12 MBM29LV400TC/BC Unit -70 -90 - 120 ...

Page 33

... Program/Erase Valid to RY/BY Delay BUSY — t Delay Time from Embedded Output Enable EOE Notes: 1. This does not include the preprogramming time. 2. This timing is for Sector Protection operation. /MBM29LV400BC -70/-90/-12 Description Max. Min. Max. Max. -70/-90/-12 MBM29LV400TC/BC Unit -70 -90 - ...

Page 34

... MBM29LV400TC SWITCHING WAVEFORMS • Key to Switching Waveforms Addresses Outputs Figure 5.1 34 /MBM29LV400BC -70/-90/-12 WAVEFORM INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” Changing Any Change ...

Page 35

... MBM29LV400TC Addresses t RH RESET High-Z Outputs Figure 5.2 AC Waveforms for Hardware Reset/Read Operations /MBM29LV400BC -70/-90/- Addresses Stable t ACC Output Valid -70/-90/- ...

Page 36

... MBM29LV400TC 3rd Bus Cycle Addresses 555H GHWL WE t A0H Data Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device the output of the data written to the device. ...

Page 37

... MBM29LV400TC 3rd Bus Cycle Addresses 555H GHEL CE t Data A0H Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device the output of the data written to the device. ...

Page 38

... MBM29LV400TC Addresses GHWL WE Data t VCS V CC Notes the sector address for Sector Erase. Addresses = 555H (Word), AAAH (Byte) for Chip Erase. 2. These waveforms are for the 16 mode. (The addresses differ from 8 mode.) Figure 8 38 /MBM29LV400BC -70/-90/-12 2AAH 555H 555H ...

Page 39

... MBM29LV400TC OEH WE Data DQ 7 Data Valid Data (The device has completed the Embedded operation). 7 Figure 9 AC Waveforms for Data Polling during Embedded Algorithm Operations CE t OEH WE t OES OE DQ Data DQ = Toggle stops toggling (The device has completed the Embedded operation). ...

Page 40

... MBM29LV400TC CE WE RY/BY Figure 11 RY/BY Timing Diagram during Program/Erase Operations WE RESET RY/BY 40 /MBM29LV400BC -70/-90/-12 The rising edge of the last WE signal READY Figure 12 RESET/RY/BY Timing Diagram -70/-90/-12 Entire programming or erase operations BUSY t RB ...

Page 41

... MBM29LV400TC CE BYTE ELFH Figure 13 Timing Diagram for Word Mode Configuration CE BYTE t ELFL Figure 14 Timing Diagram for Byte Mode Configuration BYTE Figure 15 /MBM29LV400BC -70/-90/-12 Data Output Data Output ( ( FHQV ...

Page 42

... MBM29LV400TC Data t VCS V CC SAX : Sector Address for initial sector SAY : Sector Address for next sector Note byte mode Figure 16 42 /MBM29LV400BC ...

Page 43

... MBM29LV400TC VIDR t VCS RESET CE WE RY/BY Figure 17 Temporary Sector Un- Enter Erase Embedded Suspend Erasing WE Erase Erase Suspend Read Toggle DQ and with OE Note read from the erase-suspended sector. 2 /MBM29LV400BC -70/-90/-12 t Program or Erase Command Sequence VLHT Unprotection Period ...

Page 44

... MBM29LV400TC VCS RESET t VLHT t VIDR Add Data SPAX : Sector Address to be protected SPAY : Next Sector Address to be protected TIME-OUT : Time-Out window = 150 s (min) Figure 19 44 /MBM29LV400BC -70/-90/-12 SPAX TIME-OUT 60H 60H Extended Sector Protection Timing Diagram -70/-90/-12 SPAX ...

Page 45

... MBM29LV400TC EMBEDDED ALGORITHMS Increment Address * : The sequence is applied for The addresses differ from 8 mode. Figure 20 /MBM29LV400BC -70/-90/-12 Start Write Program Command Sequence (See below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/A0H Program Address/Program Data 16 mode ...

Page 46

... MBM29LV400TC EMBEDDED ALGORITHMS Chip Erase Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/AAH 2AAH/55H * : The sequence is applied for The addresses differ from 46 /MBM29LV400BC -70/-90/-12 Start Write Erase Command Sequence (See below) Data Polling or Toggle Bit Successfully Completed Erasure Completed Individual Sector/Multiple Sector* Erase Command Sequence ...

Page 47

... MBM29LV400TC Start Read ( Addr Data Yes Read ( Addr Data Fail Note rechecked even Figure 22 /MBM29LV400BC -70/-90/- Byte address for programming ) 7 = Any of the sector addresses within the sector being erased during ...

Page 48

... MBM29LV400TC Note rechecked even changing to “1” /MBM29LV400BC -70/-90/-12 Start Read ( Addr. = "H" or "L" Toggle 6 ? Yes Yes Read ( Addr Toggle 6 ? Yes Fail Pass = “1” because DQ may stop toggling at the same time as ...

Page 49

... MBM29LV400TC Increment PLSCNT No PLSCNT = 25? Yes Remove V from A ID Write Reset Command Device Failed * : byte mode Figure 24 /MBM29LV400BC -70/-90/-12 Start Setup Sector Addr PLSCNT = RESET = ...

Page 50

... MBM29LV400TC Notes: 1. All protected sectors are unprotected. 2. All previously protected sectors are protected once again. Figure 25 50 /MBM29LV400BC -70/-90/-12 Start RESET = V ID (Note 1) Perform Erase or Program Operations RESET = V IH Temporary Sector Unprotection Completed (Note 2) Temporary Sector Unprotection Algorithm -70/-90/-12 ...

Page 51

... MBM29LV400TC FAST MODE ALGORITHM Device is Operating in Temporary Sector Unprotection Mode Increment PLSCNT No PLSCNT = 25? Yes Remove V from RESET ID Write Reset Command Device Failed Figure 26 /MBM29LV400BC -70/-90/-12 Start RESET = V ID Wait Extended Sector Protection Entry? Yes To Setup Sector Protection Write XXXH/60H PLSCNT = 1 ...

Page 52

... MBM29LV400TC FAST MODE ALGORITHM Increment Address * : The sequence is applied for The addresses differ from Figure 27 52 /MBM29LV400BC -70/-90/-12 Start 555H/AAH 2AAH/55H 555H/20H XXXH/A0H Program Address/Program Data Data Polling Device No Verify Byte? Yes No Last Address ? Yes Programming Completed XXXH/90H XXXH/F0H 16 mode. 8 mode. Embedded Program ...

Page 53

... MBM29LV400TC ERASE AND PROGRAMMING PERFORMANCE Parameter Min. Sector Erase Time Word Programming Time Byte Programming Time Chip Programming Time Program/Erase Cycle 100,000 TSOP(I) PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Note: Test conditions T = 25° ...

Page 54

... MBM29LV400TC PACKAGE DIMENSIONS 48-Pin plastic TSOP(I) (FPT-48P-M19) LEAD No. 1 INDEX 24 20.00±0.20 (.787±.008) * 18.40±0.20 (.724±.008) 0.10(.004) 19.00±0.20 (.748±.008) 1996 FUJITSU LIMITED F48029S-2C-2 C 48-Pin plastic TSOP(I) (FPT-48P-M20) LEAD No. 1 INDEX 24 19.00±0.20 (.748±.008) 0.10(.004) * 18.40±0.20 (.724±.008) 20.00± ...

Page 55

... MBM29LV400TC 44-pin plastic SOP (FPT-44P-M16) +0.25 +.010 28.45 1.120 –0.20 –.008 44 INDEX LEAD No. 1 1.27(.050)TYP +0.10 0.10(.004) 0.40 –0.05 +.004 .016 –.002 26.67(1.050)REF 1998 FUJITSU LIMITED F44023S-4C-4 C /MBM29LV400BC -70/-90/-12 23 13.00±0.10 16.00±0.20 (.512±.004) (.630±.008) 22 +0.10 +.004 0.20 .008 –0.15 –.006 Ø0.13(.005) ...

Page 56

... MBM29LV400TC 48-pin plastic FBGA (BGA-48P-M01) 8.00 0.20(.315 .008) INDEX 0.10(.004) 1997 FUJITSU LIMITED B48001S-1C /MBM29LV400BC -70/-90/-12 1.20(.047)MAX (Mounting height) 0.35 0.10(.014 .004) (Stand off) 0.80(.031) NOM 6.00 0.20 4.00(.157) (.236 .008) -70/-90/-12 5.60(.221) 0.80(.031)NOM Ø0.40 0.10 Ø0.08(.003) M (.016 .004) ...

Page 57

... MBM29LV400TC 48-pin plastic CSOP (LCC-48P-M03) 48 INDEX LEAD No. 1 10.00±0.10(.394±.004) 0.40(.016) 0.08(.003) TYP 9.20(.362)REF 1998 FUJITSU LIMITED C48056S-1C-1 C /MBM29LV400BC -70/-90/-12 "A" 25 10.00±0.20 (.394±.008) 9.50±0.10 (.374±.004) +0.05 0.05 –0 +.002 .002 –.0 (Stand off) 24 0.95±0.05(.037±.002) (Mounting height) Details of " ...

Page 58

... MBM29LV400TC FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: 81(44) 754-3763 Fax: 81(44) 754-3329 http://www.fujitsu.co.jp/ North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division ...

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