MC10H351 ON Semiconductor, MC10H351 Datasheet

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MC10H351

Manufacturer Part Number
MC10H351
Description
Manufacturer
ON Semiconductor
Datasheet

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MC10H351
Quad TTL/NMOS to PECL*
Translator
Description
saturated logic section and the PECL section of digital systems when
only a +5.0 Vdc power supply is available. The MC10H351 has
TTL/NMOS compatible inputs and PECL complementary
open−emitter outputs that allow use as an inverting/non−inverting
translator or as a differential line driver. When the common strobe
input is at a low logic level, it forces all true outputs to the PECL low
logic state (≈ +3.2 V) and all inverting outputs to the PECL high logic
state (≈ +4.1 V).
and receive TTL/NMOS information differentially via balanced
twisted pair lines.
Features
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2006
February, 2006 − Rev. 7
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The MC10H351 is a quad translator for interfacing data between a
The MC10H351 can also be used with the MC10H350 to transmit
Single +5.0 Power Supply
All V
Differentially Drive Balanced Lines
t
Pb−Free Packages are Available*
pd
= 1.3 nsec Typical
CC
Pins Isolated On Chip
1
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional marking information, refer to
20 1
Application Note AND8002/D.
SOEIAJ−20
FN SUFFIX
CASE 732
CASE 738
CASE 967
CASE 775
P SUFFIX
L SUFFIX
PLLC−20
CDIP−20
PDIP−20
A
WL, L
YY, Y
WW, W = Work Week
G
ORDERING INFORMATION
http://onsemi.com
= Assembly Location
= Wafer Lot
= Year
= Pb−Free Package
MARKING DIAGRAMS*
Publication Order Number:
AWLYYWWG
MC10H352P
MC10H352L
AWLYYWW
AWLYYWW
10H351G
10H351
ALYWG
1 20
MC10H351/D

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MC10H351 Summary of contents

Page 1

... PECL low logic state (≈ +3.2 V) and all inverting outputs to the PECL high logic state (≈ +4.1 V). The MC10H351 can also be used with the MC10H350 to transmit and receive TTL/NMOS information differentially via balanced twisted pair lines. ...

Page 2

... C OUT COMMON STROBE GND Pin assignment is for Dual−in−Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). Figure 2. Dip Pin Assignment Characteristic − Ceramic http://onsemi.com ECL V ...

Page 3

Table 2. ELECTRICAL CHARACTERISTICS Symbol Characteristic ECL Power Supply Current TTL Reverse Current I Pins INH Pin 9 Forward Current I Pins INL Pin 9 V Input Breakdown ...

Page 4

... ORDERING INFORMATION Device MC10H351FN MC10H351FNG MC10H351FNR2 MC10H351FNR2G MC10H351L MC10H351M MC10H351MG MC10H351MEL MC10H351MELG MC10H351P MC10H351PG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Package PLLC−20 PLLC−20 (Pb− ...

Page 5

Y BRK −L− −M− 0.007 (0.180) Z 0.007 (0.180 −T− J VIEW S G1 0.010 (0.250) T L− NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, ...

Page 6

0.10 (0.004) 0.13 (0.005 SEATING PLANE PACKAGE DIMENSIONS SOEIAJ−20 CASE 967−01 ISSUE ...

Page 7

... BSC 1.27 BSC M 0.050 0.070 1.27 1. 0.100 BSC 2.54 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.140 2.80 3.55 L 0.300 BSC 7.62 BSC 0.020 0.040 0.51 1.01 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MC10H351/D _ ...

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