AM27X256-150PC Advanced Micro Devices, AM27X256-150PC Datasheet

AM27X256-150PC

Manufacturer Part Number

AM27X256-150PC

Description

256 kilobit (32K x 8-bit ) CMOS EPROM device

Manufacturer

Advanced Micro Devices

Datasheet

1.AM27X256-150PC.pdf (10 pages)

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Am27X256

256 Kilobit (32 K x 8-Bit) CMOS ExpressROM Device

DISTINCTIVE CHARACTERISTICS

GENERAL DESCRIPTION

The Am27X256 is a factory programmed and tested

OTP EPROM. It is programmed after packaging prior to

final test. Every device is rigorously tested under AC

and DC operating conditions to your stable code. It is

organized as 32 Kwords by 8 bits per word and is avail-

able in plastic dual in-line packages (PDIP), as well as

plastic leaded chip carrier (PLCC) packages. Express-

ROM devices provide a board-ready memory solution

for medium to high volume codes with short leadtimes.

This offers manufacturers a cost-effective and flexible

alternative to OTP EPROMs and mask programmed

ROMs.

BLOCK DIAGRAM

As an OTP EPROM alternative:

— Factory optimized programming

— Fully tested and guaranteed

As a Mask ROM alternative:

— Shorter leadtime

— Lower volume per code

Fast access time

— 55 ns

Single +5 V power supply

Compatible with JEDEC-approved EPROM

pinout

FINAL

Address

A0–A14

Inputs

OE#

CE#

Output Enable

Chip Enable

Prog Logic

Decoder

and

Data can be accessed as fast as 55 ns, allowing

high-performance microprocessors to operate with re-

duced WAIT states. The device offers separate Output

Enable (OE#) and Chip Enable (CE#) controls, thus

eliminating bus contention in a multiple bus micropro-

cessor system.

AMD’s CMOS process technology provides high

speed, low power, and high noise immunity. Typical

power consumption is only 80 mW in active mode, and

100 µW in standby mode.

High noise immunity

Low power dissipation

— 20 µA maximum CMOS standby current

Available in Plastic Dual-In-line Package (PDIP)

and Plastic Leaded Chip Carrier (PLCC)

Latch-up protected to 100 mA from –1 V to

Versatile features for simple interfacing

— Both CMOS and TTL input/output compatibility

— Two line control functions

10% power supply tolerance

Data Outputs DQ0–DQ7

+ 1 V

262,144

Bit Cell

Buffers

Output

Gating

Matrix

Publication# 12082

Issue Date: May 1998

Rev: F Amendment/0

12082F-1

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AM27X256-150PC Summary of contents

Page 1

... Single +5 V power supply Compatible with JEDEC-approved EPROM pinout GENERAL DESCRIPTION The Am27X256 is a factory programmed and tested OTP EPROM programmed after packaging prior to final test. Every device is rigorously tested under AC and DC operating conditions to your stable code organized as 32 Kwords by 8 bits per word and is avail- able in plastic dual in-line packages (PDIP), as well as plastic leaded chip carrier (PLCC) packages ...

Page 2

... V CC A14 A13 A11 A3 OE# (G#) A2 A10 A1 A0 CE# (E#) NC DQ7 DQ0 DQ6 DQ5 DQ4 DQ3 12082F-2 LOGIC SYMBOL 15 Am27X256 Am27X256 -120 -150 -200 120 150 200 120 150 200 PLCC A11 ...

Page 3

... AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: AM27X256 -55 J DEVICE NUMBER/DESCRIPTION Am27X256 256 Kilobit ( 8-Bit) CMOS ExpressROM Device Valid Combinations AM27X256-55 AM27X256-70 AM27X256-90 AM27X256-120 PC, JC, PI, JI AM27X256-150 AM27X256-200 AM27X256-255 XXXXX C CODE DESIGNATION Assigned by AMD TEMPERATURE RANGE C = Commercial ( + Industrial (– ...

Page 4

... ROM device arrays, a 4.7 µF bulk electrolytic capacitor should be used between V devices. The location of the capacitor should be close to where the power supply is connected to the array. CE Am27X256 to minimize transient effects. In addition, SS and V for each eight Outputs OUT X High Z ...

Page 5

... Ambient Temperature (T + 0.6 V Supply Read Voltages CC V for ± 5% devices . . . . . . . . . . +4. +5. for ± 10% devices . . . . . . . . . +4. +5. Operating ranges define those limits between which the func- tionality of the device is guaranteed. to –2 2.0 V for periods up Am27X256 ) . . . . . . . . . . . + .– + ...

Page 6

... OUT and removed simultaneously or after 0.5 V, which may overshoot –75 –50 – 12082F-5 Figure 2. Typical Supply Current vs. Temperature Am27X256 Min Max 2.4 0.45 2 0.5 CC –0.5 +0.8 1.0 1.0 25 1.0 100 applied 2.0 V for periods less than 20 ns. ...

Page 7

... Output timing measurement reference levels 12082F-7 2.4 V 1.5 V 0.45 V Output Note: For C = 100 pF. L INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Am27X256 All -55, -70 others 1 TTL gate L 30 100 20 0.0–3.0 0.45–2.4 1.5 0.8, 2.0 1.5 0.8, 2.0 2.0 V 2.0 V Test Points 0 ...

Page 8

... V PP 2.0 Addresses Valid 0 ACC (Note 1) after the falling edge of the addresses without impact Test Conditions OUT Am27X256 Am27X256 -70 -90 -120 -150 -200 -255 70 90 120 150 200 250 70 90 120 150 200 250 ...

Page 9

... TOP VIEW 15 .530 .580 14 SEATING PLANE .015 .014 .060 .022 .009 .015 .125 .140 .080 .095 SEATING PLANE .013 .021 .050 REF. Am27X256 .600 .625 .008 .015 .630 .700 0 10 16-038-SB-AG PD 028 DG75 7-13-95 ae .042 .056 .400 REF. .490 .530 16-038FPO-5 PL 032 ...

Page 10

... REVISION SUMMARY FOR AM27X256 Revision F Global Changed formatting to match current data sheets. Trademarks Copyright © 1998 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc. Flashrite is a trademark of Advanced Micro Devices, Inc. ...

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