W24256S-70L Winbond, W24256S-70L Datasheet

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W24256S-70L

Manufacturer Part Number
W24256S-70L
Description
32*8 normal speed, very low power CMOS static RAM
Manufacturer
Winbond
Datasheet

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W24256S-70L
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W24256S-70L
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GENERAL DESCRIPTION
The W24256 is a normal speed, very low power CMOS static RAM organized as 32768
operates on a single 5-volt power supply. This device is manufactured using Winbond's high
performance CMOS technology.
FEATURES
PIN CONFIGURATIONS
Standby :250 W
Low power consumption:
Access time: 70 nS (max.)
Active :300 mW
Single 5V power supply
Fully static operation
All inputs and outputs directly TTL compatible
V
A14
A13
WE
A12
A11
OE
A7
A6
A3
A9
A8
A5
A4
DD
I/O1
I/O2
I/O3
V
A14
A12
A7
A6
A5
A4
A3
A2
A0
SS
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28-pin
TSOP
28-pin
DIP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
28
27
26
25
24
23
22
21
20
19
18
17
16
15
I/O5
I/O4
V
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
DD
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
V
I/O3
I/O2
I/O1
A0
A1
A2
SS
32K
- 1 -
BLOCK DIAGRAM
PIN DESCRIPTION
Three-state outputs
Battery back-up operation capability
Data retention voltage: 2V (min.)
Packaged in 28-pin 600 mil DIP, 330 mil SOP
and standard type one TSOP (8 mm
mm)
SYMBOL
I/O1 I/O8
A0 A14
V
V
WE
OE
CS
8 CMOS STATIC RAM
DD
SS
WE
OE
CS
A12
A14
A2
A3
A4
A5
A6
A7
A13
I/O1
I/O8
Publication Release Date: October 1999
Preliminary W24256
CLK GEN.
Address Inputs
Data Inputs/Outputs
Chip Select Input
Write Enable Input
Output Enable Input
Power Supply
Ground
DATA
CNTRL.
CLK
GEN.
W
R
O
D
E
C
O
D
E
R
A11
COLUMN DECODER
DESCRIPTION
CORE CELL ARRAY
PRECHARGE CKT.
64 X 8 COLUMNS
A10 A1 A0 A8 A9
512 ROWS
I/O CKT.
Revision A1
8 bits that
13.4

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W24256S-70L Summary of contents

Page 1

... GENERAL DESCRIPTION The W24256 is a normal speed, very low power CMOS static RAM organized as 32768 operates on a single 5-volt power supply. This device is manufactured using Winbond's high performance CMOS technology. FEATURES Low power consumption: Access time (max.) Active :300 mW Standby :250 W ...

Page 2

TRUTH TABLE Not Selected Output Disable Read Write DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER Supply Voltage to V Potential SS Input/Output to V Potential SS ...

Page 3

CAPACITANCE ( MHz PARAMETER Input Capacitance Input/Output Capacitance Note: These parameters are sampled but not 100% tested. AC CHARACTERISTICS AC Test Conditions PARAMETER Input Pulse Levels Input Rise and ...

Page 4

AC Characteristics, continued ( 10 0V Read Cycle PARAMETER Read Cycle Time Address Access Time Chip Select Access Time Output Enable to Output Valid Chip Selection ...

Page 5

TIMING WAVEFORMS Read Cycle 1 (Address Controlled) Address D OUT Read Cycle 2 (Chip Select Controlled OUT Read Cycle 3 (Output Enable Controlled) Address OUT Preliminary W24256 ACS ...

Page 6

Timing Waveforms, continued Write Cycle 1 Address OUT D IN Write Cycle Fixed Address OUT D IN Notes: 1. During this period, I/O pins are in the ...

Page 7

... ACCESS TIME (nS) W24256-70L 70 W24256-70LL 70 W24256S-70L 70 W24256S-70LL 70 W24256Q-70L 70 W24256Q-70LL 70 Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure. ...

Page 8

PACKAGE DIMENSIONS 28-pin P-DIP 28-pin SOP Wide Body Seating Plane Base Plane 1 ...

Page 9

Package Dimensions, continued 28-pin Standard Type One TSOP Preliminary W24256 Dimension In Inches Dimension In mm Symbol Max. Min. Nom. ...

Page 10

... Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064 - 10 - Preliminary W24256 DESCRIPTION Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2727 N. First Street, San Jose, CA 95134, U.S.A. TEL: 408-9436666 FAX: 408-5441798 ...

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