M5M51008CP-70H MITSUBISHI, M5M51008CP-70H Datasheet

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M5M51008CP-70H

Manufacturer Part Number
M5M51008CP-70H
Description
1048576-bit (131072-word by 8-bit) CMOS static RAM
Manufacturer
MITSUBISHI
Datasheet

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Manufacturer
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Part Number:
M5M51008CP-70H
Manufacturer:
MIT
Quantity:
250
Part Number:
M5M51008CP-70HI
Manufacturer:
MIT
Quantity:
5 510
Part Number:
M5M51008CP-70HI
Manufacturer:
NEC
Quantity:
5 510
DESCRIPTION
FEATURES
APPLICATION
Small capacity memory units
The M5M51008CP,FP,VP,RV,KV,KR are a 1048576-bit CMOS
static RAM organized as 131072 word by 8-bit which are
fabricated using high-performance quadruple-polysilicon and
double metal CMOS technology. The use of thin film transistor
(TFT) load cells and CMOS periphery result in a high density and
low power static RAM.
for the battery back-up application.
small outline package which is a high reliability and high density
surface mount device(SMD). Two types of devices are available.
M5M51008CVP,KV(normal lead bend type package),
M5M51008CRV,KR(reverse lead bend type package).Using both
types of devices, it becomes very easy to design a printed circuit
board.
M5M51008CP,FP,VP,RV,KV,KR-55H
M5M51008CP,FP,VP,RV,KV,KR-70H
M5M51008CP,FP,VP,RV,KV,KR-55X
M5M51008CP,FP,VP,RV,KV,KR-70X
They are low standby current and low operation current and ideal
The M5M51008CVP,RV,KV,KR are packaged in a 32-pin thin
Low stand-by current 0.1µA (typ.)
Directly TTL compatible : All inputs and outputs
Easy memory expansion and power down by S
Data hold on +2V power supply
Three-state outputs : OR - tie capability
OE prevents data contention in the I/O bus
Common data I/O
Package
M5M51008CP
M5M51008CFP
M5M51008CVP,RV ············ 32pin 8 X 20 mm
M5M51008CKV,KR ············ 32pin 8 X 13.4 mm
Type name
············ 32pin 600mil
············ 32pin 525mil
Access
(max)
time
55ns
70ns
55ns
70ns
(1MHz)
(1MHz)
Active
(max)
15mA
Power supply current
DIP
SOP
1
,S
2
2
2
TSOP
(Vcc=3.0V typ)
(Vcc=5.5V)
(Vcc=5.5V)
TSOP
stand-by
20µA
0.1µA
(max)
8µA
1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM
MITSUBISHI
ELECTRIC
M5M51008CP,FP,VP,RV,KV,KR -55H, -70H,
PIN CONFIGURATION (TOP VIEW)
ADDRESS
OUTPUTS
A
A
A
A
A
A
A
NC
V
A
S
W
A
A
A
A
A
A
A
A
W
S
A
V
NC
A
A
A
A
A
A
A
INPUTS/
4
5
6
7
12
14
16
CC
15
2
13
8
9
11
INPUTS
11
9
8
13
2
15
CC
16
14
12
7
6
5
4
DATA
16
15
14
13
12
11
10
10
11
12
13
14
15
16
7
6
5
4
3
2
1
1
2
3
4
5
6
7
8
9
9
8
Outline 32P3H-F(RV), 32P3K-C(KR)
Outline 32P3H-E(VP), 32P3K-B(KV)
Outline 32P4(P), 32P2M-A(FP)
NC
A
DQ
DQ
DQ
GND
A
A
A
A
A
A
A
A
A
A
16
14
12
7
6
5
4
3
2
1
0
1
2
3
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
M5M51008CRV,KR
M5M51008CVP,KV
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
MITSUBISHI LSIs
NC : NO CONNECTION
V
W
DQ
DQ
DQ
DQ
DQ
A
S
A
A
A
A
OE
A
S
CC
15
2
13
8
9
11
10
1
8
7
6
5
4
INPUT
INPUT
INPUT
OUTPUT ENABLE
INPUT
INPUT
INPUT
ADDRESS
CHIP SELECT
WRITE CONTROL
ADDRESS
CHIP SELECT
-55X, -70X
DATA
INPUTS/
OUTPUTS
ADDRESS
INPUTS
19
18
17
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
32
31
30
29
28
27
26
25
24
23
22
21
20
OE
A
S
DQ
DQ
DQ
DQ
DQ
GND
DQ
DQ
DQ
A
A
A
A
A
A
A
A
DQ
DQ
DQ
GND
DQ
DQ
DQ
DQ
DQ
S
A
OE
10
1
0
1
2
3
3
2
1
0
1
10
8
7
6
5
4
3
2
1
1
2
3
4
5
6
7
8
1

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M5M51008CP-70H Summary of contents

Page 1

... DESCRIPTION The M5M51008CP,FP,VP,RV,KV,KR are a 1048576-bit CMOS static RAM organized as 131072 word by 8-bit which are fabricated using high-performance quadruple-polysilicon and double metal CMOS technology. The use of thin film transistor (TFT) load cells and CMOS periphery result in a high density and low power static RAM. ...

Page 2

... A11 * Pin numbers inside dotted line show those of TSOP M5M51008CP,FP,VP,RV,KV,KR -55H, -70H, 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM When setting and OE. a non-selectable mode in which both reading and writing are 1 2 disabled. In this mode, the output stage high- impedance ...

Page 3

... Symbol Input capacitance C I Output capacitance C O Note 1: Direction for current flowing into positive (no mark). 2: Typical value is Vcc = 5V 25°C M5M51008CP,FP,VP,RV,KV,KR -55H, -70H, 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM Conditions With respect to GND Ta=25°C (Ta=0~70°C, Vcc=5V±10%, unless otherwise noted) Test conditions I = 1.0mA – ...

Page 4

... Output disable time from W low dis(W) t Output disable time from OE high dis(OE) t Output enable time from W high en(W) t Output enable time from OE low en(OE) M5M51008CP,FP,VP,RV,KV,KR -55H, -70H, 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM (Ta=0~70°C, 5V±10% unless otherwise noted ) =0.6V (-70H,-70X) =0.0V (-55H,-55X) (for dis ,t ...

Page 5

... TIMING DIAGRAMS Read cycle "H" level Write cycle (W control mode 1~8 M5M51008CP,FP,VP,RV,KV,KR -55H, -70H, 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM a( (S1) (Note (S2) (Note (OE (OE) (Note (S1 (S2 ...

Page 6

... Note 3: Hatching indicates the state is "don't care". 4: Writing is executed while S 5: When the falling edge simultaneously or prior to the falling edge rising edge Don't apply inverted phase signal externally when DQ pin is output mode. M5M51008CP,FP,VP,RV,KV,KR -55H, -70H, 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM ...

Page 7

... Power down recovery time rec (PD) (3) POWER DOWN CHARACTERISTICS S control mode 2. control mode 0.2V M5M51008CP,FP,VP,RV,KV,KR -55H, -70H, 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM (Ta=0~70°C, unless otherwise noted) Test conditions 2.2V Vcc(PD) 2V Vcc(PD) 2.2V 4.5V Vcc(PD) Vcc(PD)<4. 0.2V, 2 other inputs = 0~ –0.2V, 1 ...

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