AM29LV160DT-70WCC Advanced Micro Devices, AM29LV160DT-70WCC Datasheet
AM29LV160DT-70WCC
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AM29LV160DT-70WCC Summary of contents
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Am29LV160D 16 Megabit ( 8-Bit 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS Single power supply operation — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications — Regulated ...
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GENERAL DESCRIPTION The Am29LV160D Mbit, 3.0 Volt-only Flash memory organized as 2,097,152 bytes or 1,048,576 words. The device is offered in 48-ball FBGA, 44-pin SO, and 48-pin TSOP packages. The word-wide data (x16) appears on DQ15–DQ0; the ...
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... Program and Erase Operation Status .................................... 10 Standby Mode ........................................................................ 10 Automatic Sleep Mode ........................................................... 10 RESET#: Hardware Reset Pin ............................................... 11 Output Disable Mode .............................................................. 11 Table 2. Sector Address Tables (Am29LV160DT) ..........................12 Table 3. Sector Address Tables (Am29LV160DB) ..........................13 Autoselect Mode ..................................................................... 14 Table 4. Am29LV160D Autoselect Codes (High Voltage Method) ..14 Sector Protection/Unprotection ............................................... 14 Temporary Sector Unprotect .................................................. 15 Figure 1 ...
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PRODUCT SELECTOR GUIDE Family Part Number Speed Option Voltage Range: V Max access time ACC Max CE# access time Max OE# access time Note: See “AC Characteristics” for full ...
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CONNECTION DIAGRAMS A15 1 2 A14 A13 3 A12 4 A11 5 6 A10 A19 WE# 11 RESET RY/BY A18 A17 ...
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CONNECTION DIAGRAMS RESET# A18 A17 CE OE# 14 DQ0 15 DQ8 16 DQ1 17 DQ9 18 DQ2 19 DQ10 20 DQ3 21 DQ11 ...
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PIN CONFIGURATION A0–A19 = 20 addresses DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1 = DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) BYTE# = Selects 8-bit or 16-bit mode CE# = Chip enable OE# = Output enable WE# ...
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... SPEED OPTION See Product Selector Guide and Valid Combinations BOOT CODE SECTOR ARCHITECTURE T = Top sector B = Bottom sector Valid Combinations for FBGA Packages Order Number Am29LV160DT-70, Am29LV160DB-70 Am29LV160DT-90, Am29LV160DB-90 Am29LV160DT-120, Am29LV160DB-120 Am29LV160D Package Marking L160DT70V, L160DB70V WCC, L160DT90V, WCI L160DB90V WCE ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register it- self does not occupy any addressable memory loca- tion. The register is composed ...
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Writing Commands/Command Sequences To write a command or command sequence (which includes programming data to the device and erasing sectors of memory), the system must drive WE# and CE and OE For ...
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RESET#: Hardware Reset Pin The RESET# pin provides a hardware method of reset- ting the device to reading array data. When the system drives the RESET# pin to V for at least a period the device immediately ...
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... Table 2. Sector Address Tables (Am29LV160DT) Sector A19 A18 A17 A16 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 ...
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Table 3. Sector Address Tables (Am29LV160DB) Sector A19 A18 A17 A16 SA0 SA1 SA2 SA3 SA4 SA5 ...
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Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equipment to automatically match a device to be programmed with its corresponding ...
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Temporary Sector Unprotect This feature allows temporary unprotection of previ- ously protected sectors to change data in-system. The Sector Unprotect mode is activated by setting the RE- SET# pin During this mode, formerly protected ID sectors can ...
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START PLSCNT = 1 RESET Wait First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with ...
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COMMON FLASH MEMORY INTERFACE (CFI) The Common Flash Interface (CFI) specification out- lines device and host system software interrogation handshake, which allows specific vendor-specified software algorithms to be used for entire families of devices. Software support can then be device-indepen- ...
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Addresses Addresses (Word Mode) (Byte Mode) 1Bh 36h 1Ch 38h 1Dh 3Ah 1Eh 3Ch 1Fh 3Eh 20h 40h 21h 42h 22h 44h 23h 46h 24h 48h 25h 4Ah 26h 4Ch Addresses Addresses (Word Mode) (Byte Mode) 27h 4Eh 28h 50h ...
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Table 8. Primary Vendor-Specific Extended Query Addresses Addresses (Word Mode) (Byte Mode) 40h 80h 41h 82h 42h 84h 43h 86h 44h 88h 45h 8Ah 46h 8Ch 47h 8Eh 48h 90h 49h 92h 4Ah 94h 4Bh 96h 4Ch 98h Hardware Data ...
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COMMAND DEFINITIONS Writing specific address and data commands or sequences into the command register initiates device operations. Table 9 defines the valid register command sequences. Writing incorrect address and data values or writing them in the improper sequence resets the ...
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The Byte Program command se- quence should be reinitiated once the device has reset to reading array data, to ensure data integrity. Programming is allowed in any sequence and across sector boundaries. ...
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Operation Status” for information on these sta- tus bits. When the Embedded Erase algorithm is com- plete, the device returns to reading array data and addresses are no longer latched. Figure 4 illustrates the algorithm for the erase opera- ...
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See “Autoselect Command Sequence” for more information. The system must write the Erase Resume command (address bits are “don’t care”) to exit the erase suspend mode and continue the sector erase operation. Further writes of the Resume command ...
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Command Definitions Table 9. Am29LV160D Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte ...
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WRITE OPERATION STATUS The device provides several bits to determine the status of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 10 and the following subsec- tions describe the functions of these bits. DQ7, RY/BY#, and DQ6 ...
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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...
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The remaining scenario is that the system initially determines that the toggle bit is toggling and DQ5 has not gone high. The system may continue to monitor ...
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DQ5: Exceeded Timing Limits DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit. Under these conditions DQ5 produces a “1.” This is a failure condition that indicates the program or erase cycle was ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . – +150 C Ambient Temperature with Power Applied ...
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DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Notes Active Write Current CC I CC2 (Notes ...
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DC CHARACTERISTICS (Continued) Zero Power Flash 500 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...
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TEST CONDITIONS Device Under Test C L 6.2 k Note: Diodes are IN3064 or equivalent Figure 11. Test Setup Key to Switching Waveforms WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Figure 12. Input Waveforms ...
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AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...
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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded Algorithms) t READY to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...
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AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std Description t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...
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AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY# t VCS V CC Notes program address program data Illustration shows device in word ...
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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE# OE# WE Data RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid Address for reading status data ...
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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...
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AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use CE# or OE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector. Temporary Sector ...
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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# Note: For sector protect For sector unprotect ...
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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes program address program data, DQ7# = complement of the data written ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 3) Word Mode Notes: 1. Typical program and erase times assume the following conditions 3.0 ...
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PHYSICAL DIMENSIONS* TS 048—48-Pin Standard TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering. Am29LV160D Dwg rev AA; 10/99 45 ...
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PHYSICAL DIMENSIONS TSR048—48-Pin Reverse TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering. 46 Am29LV160D Dwg rev AA; 10/99 ...
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PHYSICAL DIMENSIONS FBC048—48-Ball Fine-Pitch Ball Grid Array (FBGA Am29LV160D Dwg rev AF; 10/99 47 ...
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PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package 48 Am29LV160D Dwg rev AC; 10/99 ...
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... Trademarks Copyright © 2000 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc. ExpressFlash is a trademark of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. ...