K6R1008V1D-UI10 Samsung, K6R1008V1D-UI10 Datasheet
K6R1008V1D-UI10
Available stocks
Related parts for K6R1008V1D-UI10
K6R1008V1D-UI10 Summary of contents
Page 1
... The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques- tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters. ...
Page 2
... K6R1004V1D 1Mb Async. Fast SRAM Ordering Information Org. Part Number K6R1004C1D-J(K)C(I) 10 256K x4 K6R1004V1D-J(K)C(I) 08/10 K6R1008C1D-J(K,T,U)C(I) 10 128K x8 K6R1008V1D-J(K,T,U)C(I) 08/10 K6R1016C1D-J(K,T,U,E)C(I) 10 64K x16 K6R1016V1D-J(K,T,U,E)C(I) 08/10 VDD(V) Speed ( ns ) PKG 32-SOJ K: 32-SOJ(LF) 3.3 8/ 32-SOJ K : 32-SOJ(LF 32-TSOP2 3.3 8/ 32-TSOP2(LF 44-SOJ K : 44-SOJ(LF 44-TSOP2 U : 44-TSOP2(LF) 3.3 8/ 48-TBGA - 2 - PRELIMINARY PRELIMINARY for AT&T CMOS SRAM Temp. & ...
Page 3
... The K6R1004V1D uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNG′s advanced CMOS process and designed for high-speed circuit technology particularly well suited for use in high-density high-speed system applications. The K6R1004V1D is packaged in a 400 mil 32-pin plastic SOJ ...
Page 4
K6R1004V1D ABSOLUTE MAXIMUM RATINGS* Parameter Voltage on Any Pin Relative Voltage on V Supply Relative Power Dissipation Storage Temperature Operating Temperature Commercial Industrial * Stresses greater than those listed under "Absolute Maximum Ratings" ...
Page 5
K6R1004V1D AC CHARACTERISTICS (T A TEST CONDITIONS Parameter Input Pulse Levels Input Rise and Fall Times Input and Output timing Reference Levels Output Loads Output Loads(A) D OUT Z = 50Ω Capacitive Load consists of all components of ...
Page 6
K6R1004V1D WRITE CYCLE* Parameter Symbol Write Cycle Time t Chip Select to End of Write t Address Set-up Time Address Valid to End of Write t Write Pulse Width(OE High) t Write Pulse Width(OE Low) t Write Recovery Time t ...
Page 7
K6R1004V1D NOTES(READ CYCLE high for read cycle. 2. All read cycle timing is referenced from the last valid address to the first transition address and t are defined as the time at which the outputs ...
Page 8
K6R1004V1D TIMING WAVEFORM OF WRITE CYCLE(3) Address CS WE High-Z Data in High-Z Data out NOTES(WRITE CYCLE) 1. All write cycle timing is referenced from the last valid address to the first transition address write occurs during the ...
Page 9
K6R1004V1D PACKAGE DIMENSIONS 32-SOJ-400 #32 11.18 ±0.12 0.440 ±0.005 #1 +0.10 0.43 -0.05 0. +0.004 0.017 0.0375 -0.002 #17 #16 21.36 MAX 0.841 20.95 ±0.12 0.825 ±0.005 +0.10 0.71 -0.05 1.27 +0.004 0.028 0.050 -0.002 - 9 - ...