MC68030RC33

Manufacturer Part NumberMC68030RC33
DescriptionMC68030RC33ENHANCED 32-BIT MICROPROCESSOR
ManufacturerMotorola
MC68030RC33 datasheet
 
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Coprocessor Interface Description
(UNABLE TO LOCATE ART)
Figure 10-16. Coprocessor Context Save Instruction Protocol
Once the coprocessor has suspended or completed the instruction it is executing, it places
a format code representing the internal coprocessor state in the save CIR. When the main
processor reads the save CIR, it transfers the format word to the effective address specified
in the cpSAVE instruction. The lower byte of the coprocessor format word specifies the
number of bytes of state information, not including the format word and associated null word,
to be transferred from the coprocessor to the effective address specified. If the state
information is not a multiple of four bytes in size, the MC68030 initiates format error
exception processing (refer to 10.5.1.5 Format Errors). The coprocessor and main
processor coordinate the transfer of the internal state of the coprocessor using the operand
CIR. The MC68030 completes the coprocessor context save by repeatedly reading the
operand CIR and writing the information obtained into memory until all the bytes specified
in the coprocessor format word have been transferred. Following a cpSAVE instruction, the
coprocessor should be in an idle state =m that is, not executing any coprocessor
instructions.
The cpSAVE instruction is a privileged instruction. When the main processor identifies a
cpSAVE instruction, it checks the supervisor bit in the status register to determine whether
it is operating at the supervisor privilege level. If the MC68030 attempts to execute a
cpSAVE instruction while at the user privilege level (status register bit [13]=0), it initiates
privilege violation exception processing without accessing any of the coprocessor interface
registers (refer to 10.5.2.3 Privilege Violations).
The MC68030 initiates format error exception processing if it reads an invalid format word
(or a valid format word whose length field is not a multiple of four bytes) from the save CIR
during the execution of a cpSAVE instruction (refer to 10.2.3.2.3 Invalid Format Word). The
MC68030 writes an abort mask (refer to 10.2.3.2.3 Invalid Format Word) to the control CIR
to abort the coprocessor instruction prior to beginning exception processing. Figure 10-16
does not include this case since a coprocessor usually returns either a not ready or a valid
format code in the context of the cpSAVE instruction. The coprocessor can return the invalid
format word, however, if a cpSAVE is initiated while the coprocessor is executing a cpSAVE
or cpRESTORE instruction and the coprocessor is unable to support the suspension of
these two instructions.
10.2.3.4 COPROCESSOR CONTEXT RESTORE INSTRUCTION.
The
M68000
coprocessor context restore instruction category includes one instruction. The coprocessor
context restore instruction, denoted by the cpRESTORE mnemonic, forces a coprocessor
to terminate any current operations and to restore a former state. During the execution of a
cpRESTORE instruction, the coprocessor can communicate status information to the main
processor by placing format codes in the restore CIR.
10.2.3.4.1 Format. Figure 10-17 shows the format of the cpRESTORE instruction.
10-26
MC68030 USER’S MANUAL
MOTOROLA