74LVX14MSCX Fairchild Semiconductor, 74LVX14MSCX Datasheet

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74LVX14MSCX

Manufacturer Part Number
74LVX14MSCX
Description
Low Voltage Hex Inverter with Schmitt Trigger Input
Manufacturer
Fairchild Semiconductor
Datasheet
© 1999 Fairchild Semiconductor Corporation
74LVX14M
74LVX14SJ
74LVX14MTC
74LVX14
Low Voltage Hex Inverter with Schmitt Trigger Input
General Description
The LVX14 contains six inverter gates each with a Schmitt
trigger input. They are capable of transforming slowly
changing input signals into sharply defined, jitter-free out-
put signals. In addition, they have a greater noise margin
than conventional inverters.
The LVX14 has hysteresis between the positive-going and
negative-going input thresholds (typically 1.0V) which is
determined internally by transistor ratios and is essentially
insensitive to temperature and supply voltage variations.
The inputs tolerate voltages up to 7V allowing the interface
of 5V systems to 3V systems.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
I
O
n
Pin Names
n
Package Number
MTC14
IEEE/IEC
M14A
M14D
Inputs
Outputs
Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
DS011603
Features
Connection Diagram
Truth Table
Input voltage level translation from 5V to 3V
Ideal for low power/low noise 3.3V applications
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Package Description
Input
A
H
L
March 1993
Revised December 1999
Output
O
H
L
www.fairchildsemi.com

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74LVX14MSCX Summary of contents

Page 1

... Pin Descriptions Pin Names Description I Inputs n O Outputs n © 1999 Fairchild Semiconductor Corporation Features Input voltage level translation from Ideal for low power/low noise 3.3V applications Guaranteed simultaneous switching noise level and dynamic threshold performance Package Description Connection Diagram Truth Table ...

Page 2

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. Input Voltage ( Output Diode Current ( 0. 0. ...

Page 3

AC Electrical Characteristics V CC Symbol Parameter (V) t Propagation PLH 2.7 t Delay Time PHL 3.3 t Output to Output 2.7 OSLH t Skew (Note 4) 3.3 OSHL Note 4: Parameter guaranteed by design OSLH PLHm Capacitance ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow www.fairchildsemi.com Package Number M14A 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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