IDT72821L20PF Integrated Device Technology, Inc., IDT72821L20PF Datasheet
IDT72821L20PF
Related parts for IDT72821L20PF
IDT72821L20PF Summary of contents
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... SyncFIFO is a trademark and the IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE 1996 Integrated Device Technology, Inc For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391. DUAL CMOS SyncFIFO (clocked) FIFOs. The device is functionally equivalent to two ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 each FIFO bank to improve memory utilization. If not pro- grammed, the programmable flags default to empty+7 for PAEA PAEB ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 PIN DESCRIPTIONS The 72801/72811/72821/72831/72841s two FIFOs, referred to as FIFO A and FIFO B, are identical in every respect. The ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 ABSOLUTE MAXIMUM RATINGS Symbol Rating V Terminal Voltage with TERM Respect to GND T Operating Temperature A T Temperature Under ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 ELECTRICAL CHARACTERISTICS (Commercial 10 Symbol Parameter f Clock Cycle Frequency S t Data ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 SIGNAL DESCRIPTIONS FIFO A and FIFO B are identical in every respect. The following description explains the interaction of input ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 LDA WENA1 (1) WCLKA OPERATION ON FIFO A LDB WENB1 (1) WCLKB OPERATION ON FIFO Empty Offset ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 OUTPUTS: FFA FFB FFA FFB FFA FFB Full Flag ( , ) — ( further write operations, when Array A ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 RSA RSB ( ) RENA1 RENA2 , RENB1 RENB2 ( , ) WENA1 WENB1 ( ) LDA (1) WENA2/ LDB ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 WCLKA (WCLKB) ( WENA1 WENB1 ( ) WENA2 (WENB2) (If ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 RCLKA (RCLKB) t ENS RENA1 RENA2 , RENB1 RENB2 ( , ) EFA EFB ( ) ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 WCLKA (WCLKB ( WENA1 WENB1 ( ) WENA2 (WENB2) (If ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 WRITE WCLKA (WCLKB ( FFA FFB ( ) WENA1 ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 WCLKA (WCLKB DATA WRITE 1 ( ENH ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 CLKH WCLKA (WCLKB) WENA1 WENB1 ( WENA2 (WENB2) (If Applicable) PAFA PAFB ( ) RCLKA (RCLKB) RENA1 RENA2 , ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 CLKH WCLKA (WCLKB) WENA1 WENB1 ( ) WENA2 (WENB2) (If Applicable) PAEA , n words in FIFO PAEB RCLKA ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 CLKH WCLKA (WCLKB) t ENS LDA LDB ( ) WENA1 WENB1 ( ) ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 OPERATING CONFIGURATIONS SINGLE DEVICE CONFIGURATION — When FIFO A ( Single Device Configuration, the Read Enable 2 ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 TWO PRIORITY DATA BUFFER CONFIGURATION The two FIFOs contained in the IDT2801/72811/72821/ 72831/72841 can be used to prioritize two different ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 BIDIRIECTIONAL CONFIGURATION The two FIFOs of the IDT2801/72811/72821/72831/72841 can be used to buffer data flow in two directions. In the ...
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DUAL CMOS SyncFIFO 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9 DEPTH EXPANSION — IDT2801/72811/72821/72831/ 72841 can be adapted to applications that require greater than 256/512/1024/2048/4096 words. The existence of double ...