71V433S11PFI Integrated Device Technology, Inc., 71V433S11PFI Datasheet

71V433S11PFI

Manufacturer Part Number

71V433S11PFI

Description

32K x 32 3.3V Synchronous SRAM Flow-Through Outputs

Manufacturer

Integrated Device Technology, Inc.

Datasheet

1.71V433S11PFI.pdf (19 pages)

Specifications of 71V433S11PFI

Case

QFP

Current page: 1 of 19
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nized as 32K x 32 with full support of various processor interfaces

including the Pentium™ and PowerPC™. The flow-through burst archi-

tecture provides cost-effective 2-1-1-1 performance for processors up to

50 MHz.

Pentium is a trademark of Intel Corp.

PowerPC is a trademark of International Business Machines, Inc.

CLK

I/O

BWE

ADV

ADSC

ADSP

LBO

32K x 32 memory configuration

Supports high performance system speed:

Commercial and Industrial:

— 11 11ns Clock-to-Data Access (50MHz)

— 12 12ns Clock-to-Data Access (50MHz)

LBO input selects interleaved or linear burst mode

Self-timed write cycle with global write control (GW), byte

write enable (BWE), and byte writes (BWx)

Power down controlled by ZZ input

Single 3.3V power supply (+10/-5%)

Packaged in a JEDEC Standard 100-pin rectangular plastic

thin quad flatpack (TQFP).

The IDT71V433 is a 3.3V high-speed 1,048,576-bit SRAM orga-

–A

–I/O

, CS

, V

–BW

DDQ

SSQ

Address Inputs

Chip Enable

Chips Selects

Output Enable

Global Write Enable

Byte Write Enable

Individual Byte Write Selects

Clock Input

Burst Address Advance

Address Status (Cache Controller)

Address Status (Processor)

Linear / Interleaved Burst Order

Sleep Mode

Data Input/Output

Core and I/O Power Supply (3.3V)

Array Ground, I/O Ground

32K x 32

3.3V Synchronous SRAM

Flow-Through Outputs

control registers. There are no registers in the data output path (flow-

through architecture). Internal logic allows the SRAM to generate a

self-timed write based upon a decision which can be left until the

extreme end of the write cycle.

the system designer, as the IDT71V433 can provide four cycles of data

for a single address presented to the SRAM. An internal burst address

counter accepts the first cycle address from the processor, initiating the

access sequence. The first cycle of output data will flow-through from

the array after a clock-to-data access time delay from the rising clock

edge of the same cycle. If burst mode operation is selected (ADV=LOW),

the subsequent three cycles of output data will be available to the

user on the next three rising clock edges. The order of these three

addresses will be defined by the internal burst counter and the LBO

input pin.

CMOS process, and is packaged in a JEDEC Standard 14mm x 20mm

100-pin thin plastic quad flatpack (TQFP).

The IDT71V433 SRAM contains write, data-input, address and

The burst mode feature offers the highest level of performance to

The IDT71V433 SRAM utilizes IDT's high-performance 3.3V

Power

Input

I/O

Asynchronous

Synchronous

IDT71V433

N/A

DSC-3729/04

3729 tbl 01

Related parts for 71V433S11PFI

71V433S11PFI Summary of contents

Page 1

... Array Ground, I/O Ground SS SSQ Pentium is a trademark of Intel Corp. PowerPC is a trademark of International Business Machines, Inc. ©2000 Integrated Device Technology, Inc. 32K x 32 3.3V Synchronous SRAM Flow-Through Outputs The IDT71V433 SRAM contains write, data-input, address and control registers. There are no registers in the data output path (flow- through architecture) ...

Page 2

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs Symbol Pin Function Address Inputs A – ADSC Address Status (Cache Controller) ADSP Address Status (Processor) ADV Burst Address Advance BWE Byte Write Enable BW Individual Byte Write ...

Page 3

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs LBO ADV CLK ADSC ADSP A – BWE Powerdown OE 32 I/O –I/O ...

Page 4

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs Symbol Rating (2) V Terminal Voltage with TERM Respect to GND (3) V Terminal Voltage with TERM Respect to GND T Operating Temperature A T Temperature Under Bias BIAS T ...

Page 5

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs 100 I I DDQ V 5 SSQ I I/O 7 ...

Page 6

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs Address Operation Deselected Cycle, Power Down Deselected Cycle, Power Down Deselected Cycle, Power Down Deselected Cycle, Power Down Deselected Cycle, Power Down Read Cycle, Begin Burst Read Cycle, Begin Burst ...

Page 7

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs GW Operation Read H Read H Write all Bytes L Write all Bytes H (2) Write Byte 1 H (2) Write Byte 2 H (2) Write Byte 3 H (2) ...

Page 8

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs Symbol Parameter |I | Input Leakage Current LI ZZ & LBO Input Leakage Current | Output Leakage Current | LO V Output Low Voltage OL V Output ...

Page 9

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs Symbol Clock Parameters t Clock Cycle Time CYC (1) t Clock High Pulse Width CH (1) t Clock Low Pulse Width CL Output Parameters t Clock High to Valid Data ...

Page 10

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs Commercial and Industrial Temperature Ranges . 10 ...

Page 11

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs Commercial and Industrial Temperature Ranges 11 6.42 . ...

Page 12

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs Commercial and Industrial Temperature Ranges ...

Page 13

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs Commercial and Industrial Temperature Ranges 13 6.42 . ...

Page 14

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs Commercial and Industrial Temperature Ranges 14 . ...

Page 15

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs CLK ADSP ADSC ADDRESS Av GW, BWE, BWx CE DATA OUT NOTES input is LOW, ADV is HIGH, and LBO is Don’t Care ...

Page 16

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs CLK ADSP ADSC ADDRESS DATA IN NOTES input is LOW, ADV and OE are HIGH, and LBO is Don't Care for ...

Page 17

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs Commercial and Industrial Temperature Ranges 17 6.42 ...

Page 18

IDT71V433 32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs S X IDT 71V433 Device Power Speed Type PART NUMBER SPEED IN MEGAHERTZ 71V433S11PF 71V433S12PF PF X Package Process/ Temperature Range Blank PARAMETER CD 50 ...

Page 19

... CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 The IDT logo is a registered trademark of Integrated Device Technology, Inc. Updated to new format Revised speed offerings to 11 and MHz Adjusted page layout, added extra page Added notes to pin configuration Updated notes ...

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