DS80C320 Maxim Integrated Products, DS80C320 Datasheet
DS80C320
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DS80C320 Summary of contents
Page 1
... Three 16-bit timer/counters - 256 bytes scratchpad RAM - Addresses 64 kB ROM and 64 kB RAM § High-speed architecture - 4 clocks/machine cycle (8032=12 MHz (DS80C320 MHz (DS80C323) - Single-cycle instruction in 121 ns - Uses less power for equivalent work - Dual data pointer - Optional variable length MOVX to access fast/slow RAM/peripherals § ...
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... Typical applications will see a speed improvement of 2.5 times using the same code and same crystal. The DS80C320 offers a maximum crystal rate of 33 MHz, resulting in apparent execution speeds of 82.5 MHz (approximately 2.5X). ...
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... DS80C320 BLOCK DIAGRAM Figure DS80C320/DS80C323 ...
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... P1.3 TXD1 P1.4 INT2 P1.5 INT3 P1.6 INT4 P1.7 INT5 DS80C320/DS80C323 is driven high when data PSEN Function External I/O for Timer/Counter 2 Timer/Counter 2 Capture/Reload Trigger Serial Port 1 Input Serial Port 1 Output External Interrupt 2 (Positive Edge Detect) External Interrupt 3 (Negative Edge Detect) External Interrupt 4 (Positive Edge Detect) External Interrupt 5 (Negative Edge Detect) ...
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... It may be necessary to use memories with faster access times if the same crystal frequency is used. Application note 57 “DS80C320 Memory Interface Timing” useful tool to help the embedded system designer select the proper memories for her or his application. ...
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... This data sheet assumes the user is familiar with the basic features of the standard 80C32. In addition to these standard features, the DS80C320/DS80C323 includes many new functions. This data sheet provides only a summary and overview. Detailed descriptions are available in the User’s Guide located in the front of the High-Speed Microcontroller data book ...
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... This is because in most cases, the DS80C320/DS80C323 uses one cycle for each byte. The user concerned with precise program timing should examine the timing of each instruction for familiarity with the changes ...
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... XRL XRL A, direct 4 XRL A, @Ri 8 XRL A, #data 8 XRL direct XRL direct, #data 4 CLR A 8 CPL RLC RRC DS80C320/DS80C323 OSCILLATOR BYTE CYCLES ...
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... MOV bit CJNE A, direct, rel 16 CJNE A, #data, rel 16 CJNE Rn, #data, rel 16 CJNE Ri, #data, rel 12 NOP 16 JC rel 12 JNC rel 12 JB bit, rel 12 JNB bit, rel 12 JBC bit, rel DS80C320/DS80C323 8-36* 1 8-36* 1 8-36* 1 8-36 ...
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... TYPICAL MEMORY CONNECTION Figure 3 STRETCH MEMORY CYCLE The DS80C320/DS80C323 allows the application software to adjust the speed of data memory access. The microcontroller is capable of performing the MOVX in as little as two instruction cycles. However, this value can be stretched as needed so that both fast memory and slow memory or peripherals can be accessed with no glue logic ...
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... STROBE WIDTH or STROBE RD WR WIDTH IN CLOCKS TIME @ 25 MHz 160 ns 8 320 ns 12 480 ns 16 640 ns 20 800 ns 24 960 ns 28 1120 DS80C320/DS80C323 ...
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... Sample code listed below illustrates the saving from using the dual DPTR. The example program was original code written for an 8051 and requires a total of 1869 DS80C320/DS80C323 machine cycles. This takes 299 µs to execute at 25 MHz. The new code using the Dual DPTR requires only 1097 machine cycles taking 175.5 µ ...
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... The DS80C320/DS80C323 architecture normally runs using 4 clocks per cyc le. However, in the area of timers, it will default to a 12-clock per cycle scheme on a reset. This allows existing code with real-time dependencies such as baud rates to operate properly ...
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... WATCHDOG TIMER For applications that can not afford to run out of control, the DS80C320/DS80C323 incorporates a programmable watchdog timer circuit. It resets the microcontroller if software fails to reset the watchdog before the selected time interval has elapsed. The user selects one of four timeout values. After enabling the watchdog, software must reset the timer prior to expiration of the interval, or the CPU will be reset. Both the Watchdog Enable and the Watchdog Reset bits are protected by a “ ...
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... Finally, the Watchdog Interrupt is enabled using EWDI (EIE.4). INTERRUPTS The DS80C320/DS80C323 provides 13 sources of interrupt with three priority levels. The Power-fail Interrupt (PFI), if enabled, always has the highest priority. There are two remaining user selectable priorities: high and low. If two interrupts that have the same priority occur simultaneously, the natural precedence given belo w determines which is a acted upon ...
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... Idle mode itself, but the watchdog timer. As mentioned above, the Watchdog Timer provides an optional interrupt capability. This interrupt can provide a periodic interval timer to bring the DS80C320/DS80C323 out of Idle mode. This can be useful even if the Watchdog is not normally used. By enabling the Watchdog Timer and its interrupt prior to invoking Idle, a user can periodically come out of Idle perform an operation, then return to Idle until the next operation ...
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... This bit at EXIF.2 will be a logic 1 when the ring is in use. No serial communication or precision timing should be attempted while this bit is set, since the operating frequency is not precise. RING OSCILLATOR START -UP Figure 4 Diagram assumes that the operation following Stop requires less than 18 ms complete DS80C320/DS80C323 ...
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... WDIF Watchdog Interrupt Flag SPECIAL FUNCTION REGISTERS Most special features of the DS80C320/DS80C323 or 80C32 are controlled by bits in special function registers (SFRs). This allows the device to add many features but use the same instruction set. When writing software to use a new feature, the SFR must be defined to an assembler or compiler using an equate statement ...
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... SM2_0 REN_0 TB8_0 HIP LIP 1 RCLK TCLK EXEN2 - - - AC F0 RS1 RS0 EPFI PFI WDIF - - EWDI EX5 - - PWDI PX5 DS80C320/DS80C323 BIT 2 BIT 1 BIT SEL GF0 STOP IDLE IT1 IE0 IT0 MD2 MD1 MD0 P1.2 P1.1 P1.0 - RGMD RGSL BGS RB8_0 ...
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... This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. DS80C320 DC ELECTRICAL CHARACTERISTICS PARAMETER Operating Supply Voltage ...
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... Not a high impedance input. This port is a weak address holding latch because Port dedicated as an address bus on the DS80C320. Peak current occurs near the input transition point of the latch, approximately 2V. 10. Over the industrial temperature range, this specification has a maximum value of 200 µA. ...
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... TYPICAL I VERSUS FREQUENCY Figure 5 CC DS80C320 AC CHARACTERISTICS MHz PARAMETER Oscillator Freq. (Ext. Osc.) (Ext. Crystal) ALE Pulse Width Port 0 Address Valid to ALE Low Address Hold After ALE Low Address Hold After ALE Low for MOVX WR ALE Low to Valid Instruction In ALE Low to ...
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... Specifications assume a 50% duty cycle for the oscillator. Port 2 timing will change with the duty cycle variations. 5. Address is held in a weak latch until over-driven by external memory DS80C320/DS80C323 , and at PSEN ...
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... DS80C320 MOVX CHARACTERISTICS MHz PARAMETER Pulse Width RD Pulse Width WR Low to Valid Data In RD Data Hold After Read Data Float After Read ALE Low to Valid Data In Port 0 Address to Valid Data In Port 2 Address to Valid Data In ALE Low Low Port 0 Address Valid to ...
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... DS80C320 AC CHARACTERISTICS MHz PARAMETER Oscillator Frequency (Ext. Osc.) (Ext. Crystal) ALE Pulse Width Port 0 Address Valid to ALE Low Address Hold After ALE Low Address Hold After ALE Low for MOVX WR ALE Low to Valid Instruction In ALE Low to Low PSEN Pulse Width ...
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... DS80C320 MOVX CHARACTERISTICS MHz PARAMETER Pulse Width RD Pulse Width WR Low to Valid Data In RD Data Hold After Read Data Float After Read ALE Low to Valid Data In Port 0 Address to Valid Data In Port 2 Address to Valid Data In ALE Low Low Port 0 Address Valid to ...
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... V IH1 0 0 IH2 +0.25V V OL1 V OL2 V V OH1 DD -0. OH2 DD -0. OH3 DD -0. -300 RST DS80C320/DS80C323 MAX UNITS NOTES µA 2 µ ...
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... This is only the current required to hold the low level; transitions from I/O pin will also have to overcome the transition current. 12. Device operating range is 2.7V to 5.5V, however device is tested to 2.5V to ensure proper operation at minimum V RST . - 0.3V. Not a high impedance input. This port is a weak address latch DS80C320/DS80C323 ...
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... LLAX1 t 20 LLAX2 t 112 LLIV t 6 LLPL t 118 PLPH t 104 PLIV t 0 PXIX t 51 PXIZ t 140 AVIV1 t 162 AVIV2 t note 5 PLAZ DS80C320/DS80C323 VARIABLE VARIABLE CLOCK CLOCK MIN MAX 1.5t -10 CLCL 0.5t -11 CLCL 0.25t -5 note 5 CLCL 0.5t -7 CLCL 2.5t -27 CLCL 0.25t -7 CLCL 2.25t -7 CLCL 2 ...
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... QVWX t -10 CLCL WHQX CLCL 2t -5 CLCL t RLAZ t 0 WHLH t -5 CLCL machine cycles (default DS80C320/DS80C323 VARIABLE UNITS CLOCK MAX -25 CLCL ns t -25 MCS CLCL CLCL 2.5t -26 CLCL ns 1.5t -28+t CLCL MCS 3t -24 CLCL ...
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... DS80C320/DS80C323 EXTERNAL CLOCK CHARACTERISTICS PARAMETER Clock High Time Clock Low Time Clock Rise Time Clock Fall Time DS80C320/DS80C323 SERIAL PORT MODE 0 TIMING CHARACTERISTICS PARAMETER Serial Port Clock Cycle Time SM2=0 12 clocks per cycle SM2=1 4 clocks per cycle Output Data Setup to Clock ...
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... DS80C320/DS80C323 POWER CYCLE TIMING CHARACTERISTICS PARAMETER Crystal Start- up Time Power-on Reset Delay NOTES FOR POWER CYCLE TIMING CHARACTERISTICS: 1. Start- up time for crystals varies with load capacitance and manufacturer. Time shown is for an 11.0592 MHz crystal manufactured by Fox crystal. 2. Reset delay is a synchronous counter of crystal oscillations after crystal start-up. Counting begins ...
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... DATA MEMORY READ CYCLE DATA MEMORY WRITE CYCLE DS80C320/DS80C323 ...
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... DATA MEMORY WRITE WITH STRETCH DS80C320/DS80C323 ...
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... DATA MEMORY WRITE WITH STRETCH=2 EXTERNAL CLOCK DRIVE FOUR CYCLE DATA MEMORY WRITE STRETCH VALUE DS80C320/DS80C323 ...
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... SERIAL PORT MODE 0 TIMING SERIAL PORT 0 (SYNCHRONOUS MODE) HIGH SPEED OPERATION SM2=1=> TXD CLOCK=XTAL/4 SERIAL PORT 0 (SYNCHRONOUS MODE) SM2=0=> TXD CLOCK=XTAL/ DS80C320/DS80C323 ...
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... POWER CYCLE TIMING DS80C320/DS80C323 ...
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... PDIP (600-MIL) PKG 40-PIN DIM MIN MAX A - 0.200 A1 0.015 - A2 0.140 0.160 b 0.014 0.022 c 0.008 0.012 D 1.980 2.085 E 0.600 0.625 E1 0.530 0.555 e 0.090 0.110 L 0.115 0.145 eB 0.600 0.700 56-G5000-000 ALL DIMENSIONS ARE IN INCHES DS80C320/DS80C323 ...
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... INCLUDE MOLD PROTRUSION; ALLOWABLE PROTRUSION IS 0.25 MM PER SIDE. 2. DETAILS OF PIN 1 IDENTIFIER ARE OPTIONAL BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. 3. ALLOWABLE DAMBAR PROTRUSION IS 0.08 MM TOTAL IN EXCESS OF THE B DIMENSION; AT MAXIMUM MATERIAL CONDITION. PROTRUSION NOT TO BE LOCATED ON LOWER RADIUS OR FOOT OF LEAD. 4. CONTROLLING DIMENSIONS: MILLIMETERS DS80C320/DS80C323 ...
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... PIN-1 IDENTIFIER TO BE LOCATED IN ZONE INDICATED. 2. CONTROLLING DIMENSIONS ARE IN INCHES. PKG 44-PIN DIM MIN MAX A 0.165 0.180 A1 0.090 0.120 A2 0.020 - B 0.026 0.033 B1 0.013 0.021 c 0.009 0.012 CH1 0.042 0.048 D 0.685 0.695 D1 0.650 0.656 D2 0.590 0.630 E 0.685 0.695 E1 0.650 0.656 E2 0.590 0.630 e1 0.050 BSC N 0.44 - 56-G4003-001 DS80C320/DS80C323 ...
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... The following represent the key differences between the 031096 and the 052296 version of the DS80C320 data sheet. Please review this summary carefully. 1. Add Data Sheet Revision Summary. The following represent the key differences between 05/23/96 and 05/22/96 version of the DS80C320 data sheet and between 05/23/96 and 03/27/95 version of the DS80C323 data sheet. Please review this summary carefully. ...
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... Added note to prevent accidental corruption of Watchdog Timer count while changing counter length. DS80C323 1. Added note to clarify I specification Remove port 2 from V OH1 3. I for V specification changed from - mA. OH OH3 4. Added note to clarify AC timing conditions. label on figure “Serial Port Mode 0 Timing” to read t specification, add port DS80C320/DS80C323 . QVXH ...