IDT7MMV4101S15BG Integrated Device Technology, Inc., IDT7MMV4101S15BG Datasheet
IDT7MMV4101S15BG
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IDT7MMV4101S15BG Summary of contents
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... I/O14 ©2003 Integrated Device Technology, Inc. 128K x 24 Three Megabit 3.3V CMOS Static RAM The IDT7MMV4101 is a three megabit static RAM constructed on an multilayer laminate substrate using three 3.3V, 128K x 8 (IDT71V124) static RAMS encapsulated in a Ball Grid Array (BGA). The IDT7MMV4101 is packaged in a plastic BGA. The BGA configu- ration allows 119 leads to be placed on a package 14mm by 22mm ...
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IDT7MMV4101 128K x 24 Three Megabit 3.3V CMOS Static RAM (1) Symbol Parameter Conditions C Input Capacitance I/O Capacitance V I/O OUT NOTE: 1. This parameter is guaranteed by design but not tested. Symbol Parameter Min. ...
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IDT7MMV4101 128K x 24 Three Megabit 3.3V CMOS Static RAM Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load DATA OUT 216 Figure 1. Output Load GND to 3.0V 3ns 1.5V 1.5V See Figures ...
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IDT7MMV4101 128K x 24 Three Megabit 3.3V CMOS Static RAM Symbol Read Cycle t Read Cycle Time RC t Address Access Time AA t Chip Select Access Time ACS (1) Chip Select to Output in Low-Z t CLZ t Output ...
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IDT7MMV4101 128K x 24 Three Megabit 3.3V CMOS Static RAM ADDRESS OE CS HIGH IMPEDANCE DATA OUT ADDRESS DATA PREVIOUS DATA OUT NOTES HIGH for Read Cycle. 2. Device is continuously selected LOW. 3. Address ...
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IDT7MMV4101 128K x 24 Three Megabit 3.3V CMOS Static RAM ADDRESS (4) DATA OUT DATA IN ADDRESS DATA IN NOTES write occurs during the overlap of a LOW CS and ...
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IDT7MMV4101 128K x 24 Three Megabit 3.3V CMOS Static RAM 22.0 + 0.1 TOP VIEW NOTES: 1. All dimensions are in mm. IDT XXXXX X X Device Power Speed Type Commercial and Industrial Temperature Ranges ...
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... Add datasheet history Pg. 2 Reduce I 01/07/03 Changed datasheet from Prelininary to final release CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 The IDT logo is a registered trademark of Integrated Device Technology, Inc. Commercial and Industrial Temperature Ranges , I , and I to reflect K step die shrink CC SB SB1 ...
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