MBM29F800BA-70 Fujitsu, MBM29F800BA-70 Datasheet

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MBM29F800BA-70

Manufacturer Part Number
MBM29F800BA-70
Description
MBM29F800BA-708M (1M X 8/512K X 16) BIT
Manufacturer
Fujitsu
Datasheet

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FUJITSU SEMICONDUCTOR
查询29F800供应商
FLASH MEMORY
CMOS
8M (1M
MBM29F800TA
Embedded Erase
FEATURES
• Single 5.0 V read, write, and erase
• Compatible with JEDEC-standard commands
• Compatible with JEDEC-standard world-wide pinouts
• Minimum 100,000 write/erase cycles
• High performance
• Sector erase architecture
• Boot Code Sector Architecture
• Embedded Erase
• Embedded Program
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
• Low Vcc write inhibit
• Erase Suspend/Resume
• Hardware RESET pin
• Sector protection
• Temporary sector unprotection
DATA SHEET
Minimizes system level power requirements
Uses same software commands as E
48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
44-pin SOP (Package suffix: PF)
55 ns maximum access time
One 16K byte, two 8K bytes, one 32K byte, and fifteen 64K bytes.
Any combination of sectors can be concurrently erased. Also supports full chip erase.
T = Top sector
B = Bottom sector
Automatically pre-programs and erases the chip or any sector
Automatically writes and verifies data at specified address
Hardware method for detection of program or erase cycle completion
Suspends the erase operation to allow a read data in another sector within the same device
Resets internal state machine to the read mode
Hardware method disables any combination of sectors from write or erase operations
Temporary sector unprotection via the RESET pin.
TM
and Embedded Program
TM
Algorithms
TM
Algorithms
3.2 V
TM
8/512K
-55/-70/-90
are trademarks of Advanced Micro Devices, Inc.
2
PROMs
/MBM29F800BA
16) BIT
DS05-20841-4E
-55/-70/-90

Related parts for MBM29F800BA-70

MBM29F800BA-70 Summary of contents

Page 1

... Resets internal state machine to the read mode • Sector protection Hardware method disables any combination of sectors from write or erase operations • Temporary sector unprotection Temporary sector unprotection via the RESET pin. Embedded Erase TM and Embedded Program 8/512K 16) BIT /MBM29F800BA -55/-70/-90 2 PROMs TM are trademarks of Advanced Micro Devices, Inc. DS05-20841-4E -55/-70/-90 ...

Page 2

... MBM29F800TA -55/-70/-90 PACKAGE 48-pin TSOP(I) Marking Side (FPT-48P-M19) 2 /MBM29F800BA Marking Side (FPT-48P-M20) -55/-70/-90 44-pin SOP Marking Side (FPT-44P-M16) ...

Page 3

... Fujitsu’s Flash technology combines years of EPROM and E of quality, reliability, and cost effectiveness. The MBM29F800TA/BA memory electrically erase the entire chip or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one byte/word at a time using the EPROM programming mechanism of hot electron injection. /MBM29F800BA -55/-70/- ...

Page 4

... MBM29F800BA Sector Architecture -55/-70/- 16) FFFFFH 7FFFFH EFFFFH 77FFFH DFFFFH 6FFFFH CFFFFH 67FFFH BFFFFH 5FFFFH AFFFFH 57FFFH 9FFFFH 4FFFFH 8FFFFH ...

Page 5

... Buffer State Control BYTE RESET Command Register CE OE Low V Detector /MBM29F800BA -55/-70/-90 MBM29F800TA/MBM29F800BA -55 — — - RY/BY Erase Voltage Generator Program Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer for Address Program/Erase Latch ...

Page 6

... N.C. 13 MBM29F800TA/MBM29F800BA RESET 12 Reverse Pinout WE 11 N. FPT-48P-M20 6 /MBM29F800BA TSOP( BYTE ...

Page 7

... MBM29F800TA LOGIC SYMBOL RY/BY RESET BYTE /MBM29F800BA -55/-70/-90 Table 1 MBM29F800TA/BA Pin Configuration Pin Function Address Inputs Data Inputs/Outputs Chip Enable Output Enable OE Write Enable WE Ready/Busy Output RY/BY Hardware Reset Pin/ ...

Page 8

... Reset (Hardware)/Standby Legend Notes: 1. Manufacturer and device codes may also be accessed via a command register write sequence. See Table 7. 2. Refer to the section on Sector Protection can /MBM29F800BA ...

Page 9

... Fujitsu standard products are available in several packages. The order number is formed by a combination of: MBM29F800 T A -55 DEVICE NUMBER/DESCRIPTION MBM29F800 8Mega-bit (1M 5.0 V-only Read, Write, and Erase /MBM29F800BA -55/-70/-90 PFTN PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package (TSOP) Standard Pinout PFTR = 48-Pin Thin Small Outline Package (TSOP) Reverse Pinout PF = ...

Page 10

... IL code (MBM29F800TA = D6H and MBM29F800BA = 58H for 8 mode; MBM29F800TA = 22D6H and MBM29F800BA = 2258H for 16 mode). These two bytes/words are given in the tables 4.1 and 4.2. All identifiers for manufacturers and device will exhibit odd parity with DQ device codes when executing the autoselect, A ...

Page 11

... Sector Protection The MBM29F800TA/BA features hardware sector protection. This feature will disable both program and erase operations in any number of sectors (0 through 18). The sector protection feature is enabled using programming equipment at the user’s site. The device is shipped with all sectors unprotected. /MBM29F800BA -55/-70/- ...

Page 12

... The Sector Unprotection mode is activated by setting the RESET pin to high voltage (12 V). During this mode, formerly protected sectors can be programmed or erased by selecting the sector addresses. Once the taken away from the RESET pin, all the previously protected sectors will be protected again. Refer to Figures 17 and 24. 12 /MBM29F800BA -55/-70/-90 on address pin ...

Page 13

... SA8 1 0 SA9 1 0 SA10 1 0 SA11 1 0 SA12 1 1 SA13 1 1 SA14 1 1 SA15 1 1 SA16 1 1 SA17 1 1 SA18 1 1 /MBM29F800BA -55/-70/-90 Sector Address Tables (MBM29F800TA ...

Page 14

... SA9 0 1 SA10 0 1 SA11 1 0 SA12 1 0 SA13 1 0 SA14 1 0 SA15 1 1 SA16 1 1 SA17 1 1 SA18 /MBM29F800BA -55/-70/-90 Sector Address Tables (MBM29F800BA ...

Page 15

... The read or eset operation is initiated by writing the Read/Reset command sequence into the command register. Microprocessor read cycles retrieve array data from the memory. The devices remain enabled for reads until the command register contents are altered. /MBM29F800BA -55/-70/-90 MBM29F800TA/BA Command Definitions Second ...

Page 16

... Following the command write, a read cycle from address XX00H retrieves the manufacture code of 04H. A read cycle from address XX01H for 16 (XX02H for 8) returns the device code (MBM29F800TA = D6H and MBM29F800BA = 58H for 8 mode; MBM29F800TA = 22D6H and MBM29F800BA = 2258H for 16 mode). (See Tables 4.1 and 4.2.) All manufacturer and device codes will exhibit odd parity with DQ Sector state (protection or unprotection) will be informed by address XX02H for 16 (XX04H for 8) ...

Page 17

... Sector Erase time-out results in immediate termination of the time-out period and suspension of the erase operation. Writing the Erase Resume command resumes the erase operation. The addresses are “don’t cares” when writing the Erase Suspend or Erase Resume command. /MBM29F800BA -55/-70/-90 , Sector Erase Timer.) Any command other than Sector 3 is “ ...

Page 18

... are “DON’T CARES” because there is for /MBM29F800BA -55/-70/-90 will stop toggling. The user must use the address of the 6 and DQ to determine if the erase operation has been suspended. Further writes 7 to toggle. (See the section ...

Page 19

... Data Polling is the only operating function of the devices under this condition. The CE circuit will partially power down the device under these conditions (to approximately 2 mA). The OE and WE pins will control the output disable functions as described in Tables 2 and 3. /MBM29F800BA -55/-70/-90 . Upon completion of the Embedded Program 7 output ...

Page 20

... When the device is in the erase 2 mode, DQ toggles if this bit is read from the erasing sector /MBM29F800BA -55/-70/-90 never stops toggling. Once the device has exceeded timing limits, the 6 , can be used to determine whether the device is in the Embedded Erase 6 to toggle during the Embedded Erase Algorithm ...

Page 21

... It is the users responsibility to ensure that the control pins are logically correct CC LKO to prevent unintentional writes when V If Embedded Erase Algorithm is interrupted, there is possibility that the erasing sector(s) cannot be used. /MBM29F800BA -55/-70/-90 ) for at least 500 ns in order to properly reset the internal state machine bits are tri-stated ...

Page 22

... Logical Inhibit Writing is inhibited by holding any one must be a logical zero while logical one. Power-Up Write Inhibit Power-up of the device with The internal state machine is automatically reset to the read mode on power-up. 22 /MBM29F800BA -55/-70/- and will not accept commands on the rising edge of WE. ...

Page 23

... No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. /MBM29F800BA -55/-70/-90 , OE, and RESET (Note 1) ............ –2 +7 OE, and RESET pins are – ...

Page 24

... Figure +2.0 V Figure 2 +14.0 V +13 +0 Note: This waveform is applied for A Figure 3 24 /MBM29F800BA -55/-70/- Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform OE, and RESET. 9 Maximum Positive Overshoot Waveform 2 -55/-70/- ...

Page 25

... DC operating current and the frequency dependent component CC (at 6 MHz). The frequency component typically is 2 mA/MHz, with active while Embedded Algorithm (program or erase progress Applicable to sector protection function – not exceed /MBM29F800BA -55/-70/-90 Test Conditions Max ...

Page 26

... Input rise and fall times Input pulse levels: 0 3.0 V Timing measurement reference level Input: 1.5 V Output: 1.5 V Device Under Test Notes including jig capacitance (MBM29F800TA/BA-55 100 pF including jig capacitance (MBM29F800TA/BA-70/-90 /MBM29F800BA -55/-70/-90 Description Test Setup — — — — — ...

Page 27

... Write Pulse Width (Note 2) WPP — Setup Time to WE Active (Note 2) OESP — Setup Time to WE Active (Note 2) CSP — t Recover Time from RY/BY RB /MBM29F800BA -55/-70/-90 Description Min. Min. Min. Min. Min. Min. Read Min. Toggle and Data Polling Min. Min. ...

Page 28

... BYTE Switching High to Output Active FHQV — t Program/Erase Valid to RY/BY Delay BUSY — t Delay Time from Embedded Output Enable EOE Notes: 1. This does not include the preprogramming time. 2. These timing is for Sector Protection operation. 28 /MBM29F800BA -55/-70/-90 Description -55/-70/-90 MBM29F800TA/BA -55 -70 -90 Min. 500 500 500 Min. ...

Page 29

... MBM29F800TA SWITCHING WAVEFORMS • Key to Switching Waveforms WAVEFORM Addresses OEH WE High-Z Outputs Figure 5 /MBM29F800BA -55/-70/-90 INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” ...

Page 30

... D is the output of the data written to the device. OUT 5. Figure indicates last two bus cycles out of four bus cycle sequence. 6. These waveforms are for the Figure 6 AC Waveforms for Alternate WE Controlled Program Operations 30 /MBM29F800BA -55/-70/-90 Data Polling ...

Page 31

... D is the output of the data written to the device. OUT 5. Figure indicates last two bus cycles out of four bus cycle sequence. 6. These waveforms are for the Figure 7 AC Waveforms for Alternate CE Controlled Program Operations /MBM29F800BA -55/-70/-90 Data Polling WHWH1 DH ...

Page 32

... GHWL Data VCS Notes the sector address for Sector Erase. Addresses = 555H (Word), AAAH (Byte) for Chip Erase. 2. These waveforms are for the Figure 8 32 /MBM29F800BA -55/-70/- 555H 2AAH 555H WPH t DH AAH ...

Page 33

... AC Waveforms for Data Polling during Embedded Algorithm Operations CE t OEH WE t OES OE Data Toggle stops toggling (The device has completed the Embedded operation). 6 Figure 10 AC Waveforms for Toggle Bit I during Embedded Algorithm Operations /MBM29F800BA -55/-70/- Valid Data t WHWH1 ...

Page 34

... MBM29F800TA CE WE RY/BY Figure 11 RY/BY Timing Diagram during Program/Erase Operations WE RESET RY/BY 34 /MBM29F800BA -55/-70/-90 The rising edge of the last WE signal READY Figure 12 RESET/RY/BY Timing Diagram -55/-70/-90 Entire programming or erase operations t BUSY t RB ...

Page 35

... Timing Diagram for Word Mode Configuration CE BYTE t ELFL Figure 2 Timing Diagram for Byte Mode Configuration BYTE Figure 3 BYTE Timing Diagram for Write Operations /MBM29F800BA -55/-70/-90 Data Output Data Output ( ( FHQV Data Output ...

Page 36

... VLHT WE CE Data t VLHT V CC SAX = Sector Address for initial sector SAY = Sector Address for next sector Note byte mode Figure 4 36 /MBM29F800BA -55/-70/- WPP OESP VLHT t CSP AC Waveforms for Sector Protection Timing Diagram -55/-70/-90 SAY t VLHT 01H t OE ...

Page 37

... Suspend Erasing WE Erase Erase Suspend Read Toggle DQ and with OE Note read from the erase-suspended sector. 2 /MBM29F800BA -55/-70/-90 t Program or Erase Command Sequence VLHT Unprotection period Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure -55/-70/-90 ...

Page 38

... MBM29F800TA EMBEDDED ALGORITHMS Increment Address * : The sequence is applied for The addresses differ from 38 /MBM29F800BA -55/-70/-90 Start Write Program Command Sequence (See Below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/A0H Program Address/Program Data 16 mode. 8 mode. ...

Page 39

... Chip Erase Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H 555H/10H * : The sequence is applied for The addresses differ from 8 mode. Figure 3 /MBM29F800BA -55/-70/-90 Start Write Erase Command Sequece (See Below) Data Polling or Toggle Bit Successfully Completed Erasure Completed Individual Sector/Multiple Sector* Erase Command Sequence (Address/Command): ...

Page 40

... MBM29F800TA Note rechecked even /MBM29F800BA -55/-70/-90 Start Read Byte ( Addr Yes DQ = Data Yes Read Byte ( Addr Yes DQ = Data Pass Fail = “1” because DQ may change simultaneously with Figure 4 Data Polling Algorithm ...

Page 41

... MBM29F800TA No Note rechecked even changing to “1”. 5 Figure 5 /MBM29F800BA -55/-70/-90 Start Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes Yes Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes Fail Pass = “ ...

Page 42

... MBM29F800TA Increment PLSCNT PLSCNT = 25? Remove V Write Reset Command Device Failed * : byte mode /MBM29F800BA -55/-70/-90 Start Setup Sector Addr 16, PLSCNT = Activate WE Pulse Time out 100 should remain V 9 Read from Sector (Addr ...

Page 43

... MBM29F800TA Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 7 Temporary Sector Unprotection Algorithm /MBM29F800BA -55/-70/-90 Start RESET = V ID (Note 1) Perform Erase or Program Operations RESET = V IH Temporary Sector Unprotection Completed (Note 2) -55/-70/-90 43 ...

Page 44

... MHz A SOP PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Note: Test conditions T = 25° 1.0 MHz A 44 /MBM29F800BA -55/-70/-90 Limits Min. Typ. Max. — — 16 200 — 8 150 — 8.4 20 100,000 — ...

Page 45

... LEAD No. 1 INDEX 24 20.00±0.20 (.787±.008) * 18.40±0.20 (.724±.008) 0.10(.004) 19.00±0.20 (.748±.008) 1996 FUJITSU LIMITED F48029S-2C-2 C /MBM29F800BA -55/-70/-90 *: Resin protrusion. (Each side: 0.15(.006) Max) 48 Details of "A" part "A" 0.15(.006) 0.25(.010 12.00±0.20 (.472±.008) 11.50REF (.460) ...

Page 46

... FUJITSU LIMITED F48030S-2C /MBM29F800BA -55/-70/-90 *: Resin protrusion. (Each side: 0.15(.006) Max) 48 Details of "A" part "A" 25 0.50±0.10 (.020±.004) 0.15±0.10 (.006±.002) 0.50(.0197) TYP -55/-70/-90 0 ...

Page 47

... MBM29F800TA (Continued) 44-pin plastic SOP (FPT-44P-M16) 28.45 44 INDEX LEAD No. 1 1.27(.050)TYP 0.10(.004) 26.67(1.050)REF 1998 FUJITSU LIMITED F44023S-4C-4 C /MBM29F800BA -55/-70/-90 +0.25 +.010 1.120 –0.20 –.008 23 13.00±0.10 16.00±0.20 (.512±.004) (.630±.008) 22 +0.10 +0.10 0.40 0.20 –0.05 –0.15 Ø0.13(.005) M +.004 (Stand off) .016 –.002 -55/-70/-90 2.35±0.15(.093±.006) (Mounting height) 0.80± ...

Page 48

... Tel: (65) 281-0770 Fax: (65) 281-0220 http://www.fmap.com.sg/ F9903 FUJITSU LIMITED Printed in Japan 48 /MBM29F800BA -55/-70/-90 All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use ...

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