AD7450 Analog Devices, AD7450 Datasheet
AD7450
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AD7450 Summary of contents
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... PRODUCT HIGHLIGHTS 1.Operation with either power supplies. 2.High Throughput with Low Power Consumption. With a 3V supply, the AD7450 offers 3mW typ power pin and can be consumption for 833kSPS throughput. REF 3.Fully Differential Analog Input. ...
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... PRELIMINARY TECHNICAL DATA AD7450 - SPECIFICATIONS Parameter DYNAMIC PERFORMANCE Signal to (Noise + Distortion) Ratio 2 (SINAD) Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise Intermodulation Distortion (IMD) Second Order Terms Third Order Terms 3 Aperture Delay 3 Aperture Jitter 3 Full Power Bandwidth Common Mode Rejection Ratio ...
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... The reference is functional from 100mV and for 3V supplies it can range up to 2.2V (see ‘Reference Section’). 7 Sample tested @ +25°C to ensure compliance. 8 See POWER VERSUS THROUGHPUT RATE section (See ‘Serial Interface Section’) CONVERT QUIET 10 Measured with a midscale DC input. Specifications subject to change without notice. AD7450 - TIMING SPECIFICATIONS Limit MIN MAX Parameter +3V + SCLK 15 ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7450 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... Pin Mnemonic Function 1 V Reference Input for the AD7450. An external reference must be applied to this input. For a REF 5 V power supply, the reference is 2.5 V (±1%) and for power supply, the reference is 1.25 V (±1%) for specified performance. This pin should be decoupled to GND with a capacitor of at least 0.1µ ...
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... The AD7450 is tested using the CCIF standard where two input frequencies near the top end of the input bandwidth are used. In this case, the second order terms are usually ...
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... TPC 3. SINAD vs Analog Input Frequency for Various Supply Voltages TBD TPC 4 shows the power supply rejection ratio versus supply ripple frequency for the AD7450. Here, a 200mV p-p sine wave is coupled onto the V A 10nF decoupling capacitor was used on the supply and a 1µF decoupling capacitor was used on V ...
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... TPC 5 Typical Differential Nonlinearity (DNL 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0 1024 2048 CODE TPC 6 Typical Differential Nonlinearity (DNL) V TPC 7 and TPC 8 show typical INL plots for the AD7450 with V sampling frequency respectively and an input frequency of 300kHz. 1 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 3072 4096 TPC 7 Typical Integral Nonlinearity (INL) V ...
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... REF for and 3.3V respectively. DD 1.5 1 0.5 0 -0.5 -1 -1.5 1 TPC 11. Change in INL vs Reference Voltage V 2 1.5 1 0.5 0 -0.5 -1 -1.5 1.8 2.4 0 TPC 12. Change in INL vs Reference Voltage V = 3.3V* DD *See ‘Reference Section – 9 – AD7450 Positive INL Negative INL 0.5 1 1.5 2 VREF DD Positive INL Negative INL 0.6 1.2 1.8 VREF DD REF 2 2.4 = 3.3V* ...
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... TPC 15. Histogram of 10000 conversions Input with = 5V. Both ana- DD TPC 16 shows the Effective Number of Bits (ENOB) versus the Reference Voltage for V that the AD7450 has an ENOB of greater than 8-bits typi- cally when V 12 VDD = 1MSPS ...
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... Frequency (kHz) TPC 17. CMRR versus Frequency for V CIRCUIT INFORMATION The AD7450 is a fast, low power, single supply, 12-bit successive approximation analog-to-digital converter (ADC). It can operate with and 3V power supply and is capable of throughput rates up to 1MSPS and 833kSPS when supplied with a 18MHz or 15MHz clock respectively ...
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... IN IN- ) Figure 5. AD7450 Ideal Transfer Characteristic TYPICAL CONNECTION DIAGRAM Figure 6 shows a typical connection diagram for the AD7450 for both 5 V and 3 V supplies. In this setup the GND pin is connected to the analog ground plane of the system. The V pin is connected to either a 2 REF 1 ...
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... Different Values of V Analog Input Structure Figure 11 shows the equivalent circuit of the analog input structure of the AD7450. The four diodes provide ESD protection for the analog inputs. Care must be taken to ensure that the analog input signals never exceed the sup- 2 ...
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... Differential Amplifier An ideal method of applying dc differential drive to the AD7450 is to use a differential amplifier such as the AD8138. This part can be used as a single ended to differential amplifier differential to differential amplifier. In both cases the analog input needs to be bipolar. It also provides common mode level shifting and buffering of the bipolar input signal ...
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... Examples of suitable dual opamps that could be used in this configura- tion to provide differential drive to the AD7450 are the AD8042, AD8056 and the AD8022. Care must be taken when chosing the opamp used, as the selection will depend on the required power supply and the system performance objectives ...
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... Figure 17. Typical V DD SINGLE ENDED OPERATION When supplied with power supply, the AD7450 can handle a single ended input. The design of this part is optimized for differential operation so with a single ended input performance will degrade. Linearity will degrade by typically 0.2LSBs, Zero Code and the Full Scale Errors will degrade by typically 2LSBs and AC performance is not guaranteed ...
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... SCLK falling edge. 16 serial clock cycles are required to perform a conversion and to access data from the AD7450. low provides the first leading zero to be read in by the micro- controller or DSP. The remaining data is then clocked out on the subsequent SCLK falling edges beginning with the second leading zero ...
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... ADC is then powered down for a relatively long duration between these bursts of several conversions. When the AD7450 is in the power down mode, all analog circuitry is powered down. To enter power down mode, the conversion process must be interrupted by bringing ...
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... THREE STATE in power-down by executing a cycle such as that shown in Figure 22. Once supplies are applied to the AD7450, the power up time is the same as that when powering up from the power-down mode. It takes approximately 1µs to power up fully if the part powers up in normal mode not necessary to wait 1µ ...
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... For the same scenario 3V, the power dissipation DD during normal operation is 6mW max. The AD7450 can now be said to dissipate 6mW for 2µsec* during each conversion cycle. The average power dissipated during each cycle with a throughput rate of 100kSPS is therefore: (2/10) x 6mW = 1.2mW This is how the power numbers in Figure 24 are calcu- lated ...
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... PRELIMINARY TECHNICAL DATA MICROPROCESSOR AND DSP INTERFACING The serial interface on the AD7450 allows the part to be directly connected to a range of different microproces- sors. This section explains how to interface the AD7450 with some of the more common microcontroller and DSP serial interface protocols. ...
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... FSL0 =0 in CRB). Set the word length setting bits WL1 =1 and WL0 = 0 in CRA. To implement the power-down mode on the AD7450 then the word length can be changed to 8 bits by setting bits WL1 = 0 and WL0 = 0 in CRA. It should be noted that for signal processing ...
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... Digital and analog ground planes should be joined in only one place and the connection should be a star ground point estab- lished as close to the GND pin on the AD7450 as possible. Avoid running digital lines under the device as this will couple noise onto the die ...
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... PRELIMINARY TECHNICAL DATA AD7450 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-lead SOIC (SO- 968 (5 890 (4 574 (4.00 440 (6.20 497 (3.80 284 (5.80) PIN 688 (1.75 098 (0.25 532 (1.35 040 (0.10) 8 ° 500 0 .0192 (0 ° ...