PS51259-A MITSUBISHI, PS51259-A Datasheet - Page 6

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PS51259-A

Manufacturer Part Number
PS51259-A
Description
TRANSFER-MOLD TYPE INSULATED TYPE
Manufacturer
MITSUBISHI
Datasheet

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DIP-PFC Wiring Guidelines
Because DIP-PFC switches large current at a very high speed, considerable large surge voltage is generated easily between P and N termi-
nals. Please pay attention to the following items:
• The area of P-Co-N shown in Fig. 3 should be as small as possible because the rectangle shaped switching current flows on this route. In
• The two IGBT emitters are connected to the VNO terminal of LVIC inside the DIP-PFC. If the internal wiring inductance shown as L1 and L2
• In order to suppress the surge voltage, the external wiring method shown in Fig. 4 is recommended. To reduce the parasitic wiring induc-
• Please mount a fast clamp diode (EG01Y@Sanken) between N and control GND terminals to prevent control GND potential variation from
Fig. 4 RECOMMENDED WIRING METHOD
Fig. 3 DIP-PFC INTERFACE
addition, please add a bypass condenser Co’ with good frequency response such as a polypropylene film condenser closely to the P and N
terminals.
in Fig. 4 is too large, large surge voltage will be generated by di/dt. Especially, the lower the temperature, the faster the switching speed,
therefore the larger the di/dt. This surge voltage applies to the VNO and N terminals, which is possible to destruct LVIC.
tance, the wiring of the external terminals of N
the minus voltage of N terminal.
To restrain the IPM surge voltage,
mount the condenser closely to the
terminals
To reduce the parasitic inductance,
this wire should close to N terminal
N / F
V
GND
Insert a diode here
D
MCU
(N-1)
LVIC
and N
VNO
R
V
S
IN
(N-2)
should be made as short as possible.
DIP
L2
PFC
(N-1, N-2)
P
S
R
N-1
N-2
Control IC
L1
N2
N
P
Co'
GND
GND
V
V
N2
N2
D
IN
TRANSFER-MOLD TYPE
Co
INSULATED TYPE
PS51277-A
VD
Control input
Mar. 2003

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