LT6554CGN Linear Technology, LT6554CGN Datasheet - Page 9

• Manufacturer Part Number: LT6554CGN
• Description: IC BUFFER VID TRPL 650MHZ 16SSOP
• Manufacturer: Linear Technology

Specifications of LT6554CGN

• Applications: Buffer
• Number Of Circuits: 3
• -3db Bandwidth: 650MHz
• Slew Rate: 2500 V/µs
• Current - Supply: 8mA
• Current - Output / Channel: 70mA
• Voltage - Supply, Single/dual (±): 4.5 V ~ 12 V, ±2.25 V ~ 6 V
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP (0.150", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIO S I FOR ATIO
While the AGND pins on the LT6554 are not connected to
the amplifier circuitry, tying them to ground or another
“quiet” node significantly increases channel isolation and
is always recommended. The AGND pins do have ESD
protection and therefore should not be connected to
potentials outside the power supply range.
Low ESL/ESR bypass capacitors should be placed as close
to the positive and negative supply pins as possible. One
4700pF ceramic capacitor is recommended for both V
and V
trace length on each supply pin will further improve AC and
transient response as well as channel isolation. For high
current drive and large-signal transient applications, addi-
tional 1µF to 10µF tantalums should be added on each
–
. Additional 470pF ceramic capacitors with minimal
Figure 2. Response vs Series Output Resistance
Figure 1. Response vs Output Trace Length
–4
–6
–2
–2
–4
–6
6
4
2
0
6
4
2
0
0.1
0.1
V
V
R
T
V
V
R
T
S
OUT
A
A
L
S
OUT
L
= 25°C
= ±5V
= 1k
= ±5V
= 1k
= 25°C
= 200mV
= 200mV
U
1
1
FREQUENCY (MHz)
FREQUENCY (MHz)
P-P
P-P
U
2cm TRACE
10
10
R
S, OUT
4cm TRACE
4cm TRACE
0.2cm TRACE
4cm TRACE
W
= 10Ω
100
100
6554 F02
6554 F01
1000
1000
U
+
supply. The smallest value capacitors should be placed
closest to the package.
To maintain the LT6554’s channel isolation, it is beneficial
to shield parallel input and output traces using a ground
plane or power supply traces. Vias between topside and
backside metal are recommended to maintain a low
inductance ground, especially between closely spaced
signal traces.
Single Supply Operation
Figure 3 illustrates how to use the LT6554 with a single
supply ranging from 4.5V to 12V. Since the output range
is comparable to the input range, the DC bias point at the
input can be set anywhere between the supplies that will
prevent the AC-coupled signal from running into the
output range limits. As shown, the DC input level is mid-
supply.
The only additional power dissipation in the single supply
configuration is through the resistor bias string at the
input and through any load resistance at the output. In
many cases, the output can be used to directly drive other
single supply devices without additional coupling and
without any resistive load.
ESD Protection
The LT6554 has reverse-biased ESD protection diodes on
all pins. If any pins are forced a diode drop above the
positive supply or a diode drop below the negative supply,
large currents may flow through these diodes. If the
current is kept below 10mA, no damage to the device will
occur.
Figure 3. Single Supply Configuration, One Channel Shown
V
IN
22µF
5k
5k
AGND
IN
4.5V TO 12V
LT6554
1/3
V
V
+
–
6554 F03
OUT
LT6554
6554fa
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