21285-AB

Manufacturer Part Number21285-AB
DescriptionMicroprocessor, 21285 Core Logic For SA-110 Microprocessor
ManufacturerIntel Corporation
21285-AB datasheet
 

Specifications of 21285-AB

CaseBGADc99+/00+
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This register is cleared at reset

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Dword Bit
R/W
8:6
R 0
5
R/W from SA-110
R from PCI
4
R/W from SA-110
R from PCI
3
R/W from SA-110
R from PCI
2:0
R/W from SA-110
R from PCI
7.1.25
Power Management Control/Status (PMCSR) Register—
Offset 74h
This register is used by the system software to manage and monitor the PCI function’s power
management state.
Any write to this register sets a status bit that can be enabled in IRQ/FIQEnable to interrupt the
SA-110. A write by the SA-110 to this register clears this status bit.
The field names from the PCI Power Management Interface Specification are listed here for
reference; however, only the Power State field, PME_Status, and PME_En are used by the 21285
(other than for register reads and writes).
This register is cleared at reset.
Dword Bit
R/W
15
R/W from SA-110
R from PCI
14:13
R/W from SA-110
R from PCI
12:9
R/W
8
R/W
7:2
R 0
1:0
R/W
The sticky-bit operation described in the PCI Bus Power Management Interface Specification must
be emulated by SA-110 firmware. The following events must take place:
1. The SA-110 firmware wakes up the system and writes PMCSR[15] to 1.
21285 Core Logic for SA-110 Datasheet
Description
Device-specific initialization (DSI) is required following the
transition to D0 state.
Auxiliary Power Source. Support for PME# in D3
requires auxiliary power supplied by the system by way of
proprietary delivery vehicle.
PME Clock. Indicates that the function relies on the presence
of the PCI clock for PME# operation.
Version. Indicates the version of the PCI Bus Power
Management Interface Specification with which the function
complies.
Description
PME_Status. Indicates that the device would assert PME# if
PME_En is set. If this bit and PME_En in this register are
both set, the 21285 will assert Pre_PME_l.
Data Scale. Scaling factor used when interpreting the value
of the data register.
Data Select. Selects the value to be reported through the
data register.
PME_En. Enables the function to assert PME#. If this bit and
PME_Status in this register are both set, the 21285 will
assert Pre_PME_l.
Power State. Determines the power state of the function.
When the value in this field is D3 and the PMCSR register is
written, a soft reset occurs; that is, the 21285 chip asserts
nRESET and resets the internal state as if PCI_RST had
been asserted.
Registers
(Sheet 2 of 2)
state
cold
7-13