VT82C686B ETC-unknow, VT82C686B Datasheet - Page 37

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VT82C686B

Manufacturer Part Number
VT82C686B
Description
Manufacturer
ETC-unknow
Datasheet
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PCI Function 1 Registers – IDE Controller
Configuration Space IDE Header Registers
Configuration Space IDE-Specific Registers
Revision 1.71 June 9, 2000
Offset PCI Configuration Space Header
1F-1C Base Address – Sec Control / Status
Offset Configuration Space IDE Registers
1B-18 Base Address – Sec Data / Command 00000170 RO
35-3B -reserved- (unassigned)
4B-48 IDE Drive Timing Control
4E-4F -reserved-
13-10 Base Address – Pri Data / Command
17-14 Base Address – Pri Control / Status
23-20 Base Address – Bus Master Control
24-2F -reserved- (unassigned)
30-33 -reserved- (expan ROM base addr)
1-0 Vendor ID
3-2 Device ID
5-4 Command
7-6 Status
3C
3D
4C
4D
3E
3F
34
40
41
42
43
44
45
46
A
B
C
D
E
8
9
F
7HFKQRORJLHV ,QF
Revision ID
Programming Interface
Sub Class Code
Base Class Code
-reserved- (cache line size)
Latency Timer
Header Type
Built In Self Test (BIST)
Capability Pointer
Interrupt Line
Interrupt Pin
Minimum Grant
Maximum Latency
IDE Chip Enable
IDE Configuration 1
IDE Configuration 2
IDE FIFO Configuration
IDE Miscellaneous Control 1
IDE Miscellaneous Control 2
IDE Miscellaneous Control 3
IDE Address Setup Time
-reserved- (do not program)
0000CC01 RW
A8A8A8A8
000001F0 RO
000003F4 RO
00000374 RO
Default
Default
1106
0571
0080
0280
C0
0E
0A
C0
FF
nn
85
01
01
00
00
00
00
00
00
00
00
00
00
00
06
09
68
00
00
00
RW
RW
RW
RW
RW
RW
Acc
Acc
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
-31-
Configuration Space IDE-Specific Registers (continued)
I/O Registers – IDE Controller (SFF 8038 v1.0 Compliant
8C-BF -reserved-
C3-C0 PCI PM Block 1
C7-C4 PCI PM Block 2
Offset Configuration Space IDE Registers
7A-7F -reserved-
8B-88 IDE Secondary S/G Descriptor Addr
C8-FF -reserved-
Offset IDE I/O Registers
55-5F -reserved-
69-6F -reserved-
53-50 UltraDMA Extended Timing Control
61-60 IDE Primary Sector Size
62-67 -reserved-
69-68 IDE Secondary Sector Size
72-77 -reserved-
83-80 IDE Primary S/G Descriptor Address 0000 0000 RW
84-87 -reserved-
C-F Secondary Channel PRD Table Addr
4-7 Primary Channel PRD Table Addr
54
70
71
78
79
A
B
0
1
2
3
8
9
UltraDMA FIFO Control
IDE Primary Status
IDE Primary Intrpt Control
IDE Secondary Status
IDE Secondary Intrpt Control
Primary Channel Command
-reserved-
Primary Channel Status
-reserved-
Secondary Channel Command
-reserved-
Secondary Channel Status
-reserved-
Register Overview
0000 0000 RW
0002 0001 RO
0000 0000 RW
VT82C686B
07070707 RW
Default
Default
0200
0200
06
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
WC
WC
Acc
RW
RW
RW
RW
RW
RW
RW
Acc
RW
RW
RW
RW

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