VT82C686B

Manufacturer Part NumberVT82C686B
ManufacturerETC-unknow
VT82C686B datasheet
 
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Offset 46 - Miscellaneous Control 1 ................................. RW
7
PCI Master Write Wait States
0
0 Wait States ..........................................default
1
1 Wait State
6
Gate INTR
0
Disable ...................................................default
1
Enable
5
Flush Line Buffer for Int or DMA IOR Cycle
0
Disable ...................................................default
1
Enable
4
Config Command Reg Rx04 Access (Test Only)
0
Normal: Bits 0-1=RO, Bit 3=RW..........default
1
Test Mode: Bits 0-1=RW, Bit-3=RO
3
Reserved (do not program)........................ default = 0
2
Reserved (no function) .............................. default = 0
1
PCI Burst Read Interruptability
0
Allow burst reads to be interrupted by ISA
master or DMA.......................................default
1
Don’t allow PCI burst reads to be interrupted
0
Posted Memory Write Enable
0
Disable ...................................................default
1
Enable
The Posted Memory Write function is automatically
enabled when Delay Transaction (see Rx47 bit-6) is
enabled, independent of the state of this bit.
Revision 1.71 June 9, 2000
Offset 47 - Miscellaneous Control 2 ................................ RW
7
CPU Reset Source
0
Use CPURST as CPU Reset .................. default
1
Use INIT as CPU Reset
6
PCI Delay Transaction Enable
0
Disable................................................... default
1
Enable
The
"Posted
Memory
automatically enabled when this bit is enabled,
independent of the state of Rx46 bit-0.
5
EISA 4D0/4D1 Port Enable
0
Disable (ignore ports 4D0-1) ................. default
1
Enable (ports 4D0-1 per EISA specification)
4
Interrupt Controller Shadow Register Enable
0
Disable................................................... default
1
Enable (for test purposes, enable readback of
interrupt controller internal functions on I/O
reads from ports 20-21, A0-A1, A8-A9, and
C8-C9) (Contact VIA Test Engineering
department)
3
Reserved (always program to 0)..............default = 0
Note: Always mask this bit. This bit may read back
as either 0 or 1 but must always be
programmed with 0.
2
Write Delay Transaction Time-Out Timer
0
Disable................................................... default
1
Enable
1
Read Delay Transaction Time-Out Timer
0
Disable................................................... default
1
Enable
Software PCI Reset ......write 1 to generate PCI reset
0
-57-
Function 0 Registers - PCI to ISA Bridge
VT82C686B
Write"
function
is