VT82C686B

Manufacturer Part NumberVT82C686B
ManufacturerETC-unknow
VT82C686B datasheet
 


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Offset 42 - FIFO Control .................................................. RW
7-4
Reserved
........................................ always reads 0
3-2
Reserved (Do Not Program).................... default = 0
1-0
Release Continuous REQ After “N” PCICLKs
00 Do Not Release ......................................default
01 N = 32 PCICLKs
10 N = 64 PCICLKs
11 N = 96 PCICLKs
Offset 60 - Serial Bus Release Number ............................. RO
7-0
Release Number.............................. always reads 10h
Offset 83-80 – PM Capability ............................................ RO
31-0 PM Capability .................... always reads 00020001h
Offset 84 – PM Capability Status .................................... RW
7-0
PM Capability Status.......supports 00h and 11h only
Offset C1-C0 - Legacy Support ......................................... RO
15-0 UHCI v1.1 Compliant ................ always reads 2000h
Revision 1.71 June 9, 2000
USB I/O Registers
These registers are compliant with the UHCI v1.1 standard.
Refer to the UHCI v1.1 specification for further details.
I/O Offset 1-0 - USB Command
I/O Offset 3-2 - USB Status
I/O Offset 5-4 - USB Interrupt Enable
I/O Offset 7-6 - Frame Number
I/O Offset B-8 - Frame List Base Address
I/O Offset 0C - Start Of Frame Modify
I/O Offset 11-10 - Port 0 Status / Control
I/O Offset 13-12 - Port 1 Status / Control
-80-
Function 3 Registers - USB Controller Ports 2-3
VT82C686B