QL2003-XPF144C ETC-unknow, QL2003-XPF144C Datasheet
QL2003-XPF144C
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QL2003-XPF144C Summary of contents
Page 1
... OEs on all I/O pins Other Important Family Features -3.3V and 5.0V operation with low standby power -I/O pin-compatibility between different devices in the same packages -PCI compliant (at 5.0V), full speed 33 MHz implementations -High design security provided by security fuses QL2003 Block Diagram 192 Logic Cells 3.3V and 5.0V pASIC 2 FPGA 3-5 QL2003 Rev ...
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... The QL2003 is a 3,000 usable ASIC gate, 5,000 usable PLD gate member of PRODUCT the pASIC 2 family of FPGAs. pASIC 2 FPGAs employ a unique SUMMARY combination of architecture, technology, and software tools to provide high speed, high usable density, low price, and flexibility in the same devices. ...
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... QL2003 PINOUT DIAGRAM 84-PIN PLCC 3-7 3 ...
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... PINOUT DIAGRAMS PIN # 1 QL2003-1PF100C PIN # 26 PIN # 1 QL2003-1PF144C PIN # 37 100-PIN TQFP pASIC 144-PIN TQFP pASIC 3-8 QL2003 PIN # 76 PIN # 51 PIN # 109 PIN # 73 ...
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... QL2003 100 and 144 TQFP Pinout Table 144 100 144 100 Function Function TQFP TQFP TQFP TQFP VCC ...
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... Can be configured as an input and/or output. Connect to 3.3V supply. Connect to ground. QL 2003 - 1 PF100 C QuickLogic pASIC device pASIC 2 device part number Speed Grade X = quick 0 = fast 1 = faster 2 = fastest 3-10 QL2003 Operating Range C = Commercial I = Industrial Package Code PL84 = 84-pin PLCC PF100 = 100-pin TQFP PF144 = 144-pin TQFP ...
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... QL2003 ABSOLUTE MAXIMUM RATINGS Supply Voltage ……………….. -0.5 to 7.0V Input Voltage ……….… -0.5 to VCC +0.5V ESD Pad Protection ….…………… 2000V DC Input Current ….……………… Latch-up Immunity ………………. 200 mA ...
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... QuickLogic customer engineering. Industrial Commercial Min Max Min 3.0 3.6 3.0 - 0.56 2.74 0.61 0.56 2.21 0.61 0.56 1.85 0.61 Conditions IOH = -2.4 mA IOH = -10 A IOL = 4 mA IOL = 10 A 5.5V > VI > VCC VI = VCC or GND VI = VCC or GND VO = GND VO = VCC VI, VIO = VCC or GND 3-12 QL2003 Unit Max 3 2.65 2.14 1.79 Min Max Unit 2.0 V 0.8 V 2.4 V VCC-0.1 V 0 ...
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... QL2003 AC CHARACTERISTICS at VCC = 5V 1.00) Propagation delays depend on routing, fanout, load capacitance, supply voltage, junction temperature, and process variation. The AC Characteristics are a design guide to provide initial timing estimates at nominal conditions. Worst case estimates are obtained when nominal propagation delays are multiplied by the appropriate Delay Factor specified in the Delay Factor table (Operating Range) ...
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... The following loads are used for tPXZ: Propagation Delays (ns) Loads per Half Column [10 2.2 2.2 2.3 2.4 1.2 1.2 1.2 1.2 1.5 1.6 1.6 1.7 Propagation Delays (ns) Fanout [ 1.8 2.1 2.4 4.8 4.8 4.8 0.0 0.0 0.0 0.8 1.1 1.4 0.7 1.0 1.3 4.1 4.1 4.1 0.0 0.0 0.0 Propagation Delays (ns) Output Load Capacitance (pF 2.6 3.0 3.6 2.8 3.3 3.9 2.1 2.6 3.1 2.6 3.3 4.1 2.9 3.3 tPHZ 3-14 QL2003 2.5 2.6 1.2 1.2 1.2 1.8 1.9 2 2.7 3.9 4.6 4.8 4.8 4.8 0.0 0.0 0.0 1.7 2.9 3.6 1.6 2.8 3.5 4.1 4.1 4.1 0.0 0.0 0.0 75 100 150 4.1 5.2 4.5 5.7 3.7 4.8 4.9 6.5 1K tPLZ 5 pF ...