21150-AB Prefetchable Read Transactions - Intel Corporation



Manufacturer Part Number
Communications, Transparent PCI-to-PCI Bridge
Intel Corporation

Specifications of 21150-AB

Table 18. Read Transaction Prefetching (Sheet 2 of 2)
Memory read
Memory read line
Memory read multiple
Section 5.3
for detailed information about prefetchable and nonprefetchable address spaces.

Prefetchable Read Transactions

A prefetchable read transaction is a read transaction where the 21150 performs speculative Dword
reads, transferring data from the target before it is requested from the initiator. This behavior allows
a prefetchable read transaction to consist of multiple data transfers. However, byte enable bits
cannot be forwarded for all data phases as is done for the single data phase of the nonprefetchable
read transaction. For prefetchable read transactions, the 21150 forces all byte enable bits to be
turned on for all data phases.
Prefetchable behavior is used for memory read line and memory read multiple transactions, as well
as for memory read transactions that fall into prefetchable memory space.
The amount of data that is prefetched depends on the type of transaction. The amount of
prefetching may also be affected by the amount of free buffer space available in the 21150, and by
any read address boundaries encountered.
Prefetching should not be used for those read transactions that have side effects in the target device,
that is, control and status registers, FIFOs, and so on. The target device’s base address register or
registers indicate if a memory address region is prefetchable.
Nonprefetchable Read Transactions
A nonprefetchable read transaction is a read transaction where the 21150 requests 1–and only
1–Dword from the target and disconnects the initiator after delivery of the first Dword of read data.
Unlike prefetchable read transactions, the 21150 forwards the read byte enable information for the
data phase.
Nonprefetchable behavior is used for I/O and configuration read transactions, as well as for
memory read transactions that fall into nonprefetchable memory space.
If extra read transactions could have side effects, for example, when accessing a FIFO, use
nonprefetchable read transactions to those locations. Accordingly, if it is important to retain the
value of the byte enable bits during the data phase, use nonprefetchable read transactions. If these
locations are mapped in memory space, use the memory read command and map the target into
nonprefetchable (memory-mapped I/O) memory space to utilize nonprefetching behavior.
Type of Transaction
Read Behavior
Downstream: Prefetching used if
address in prefetchable Upstream:
Prefetching used if prefetch
disable is off (default)
Prefetching always used
Prefetching always used

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