AS4LC256K16EO-50TC Alliance Semiconductor, AS4LC256K16EO-50TC Datasheet
AS4LC256K16EO-50TC
Related parts for AS4LC256K16EO-50TC
AS4LC256K16EO-50TC Summary of contents
Page 1
... Features • Organization: 262,144 words × 16 bits • High speed - 45/50/60 ns RAS access time - 10/12/15/20 ns column address access time - 7/10/10 ns CAS access time • Low power consumption - Active: 280 mW max (AS4LC256K16EO-45) - Standby: 2.8 mW max, CMOS I/O (AS4LC256K16EO-45) • EDO page mode Pin arrangement /&$6 :( 8&$6 5$6 2( ...
Page 2
... The AS4LC256K16EO is fabricated with advanced CMOS technology and designed with innovative design techniques resulting in high speed, extremely low power and wide operating margins at component and system levels. The AS4LC256K16EO features a high speed page mode operation in which high speed read, write and read-write are performed on any of the 512 16 bits defined by the column address ...
Page 3
... V +5.5V OUT out =min min – min min -0.2V, CC -0.2V, 0.2V are open CC Alliance Semiconductor AS4LC256K16EO Min Max -1.0 +7.0 -1.0 +7.0 -1.0 +7.0 0 +70 -55 +150 o – 260 10 C – 1 – 50 200 – -45 -50 -60 Min Max Min Max Min Max Unit Note -10 10 ...
Page 4
... Alliance Semiconductor AS4LC256K16EO -50 -60 Max Min Max Unit – 100 – ns – 20 – ns 75K 60 75K ns – 10 – – ...
Page 5
... Min Max Min 115 – 115 58 – – – – – 15 Alliance Semiconductor AS4LC256K16EO -60 Max Min Max Unit Notes – 0 – ns – 10 – ns – 40 – ns – 0 – ns – 0 – ns – 40 – ns – ...
Page 6
... Max Min 5 – 5 – 10 – 5 – 5 – 8 – 8 – 8 -45 -50 Min Max Min 100K – 100K 85 – – 30 Alliance Semiconductor AS4LC256K16EO -60 Max Min Max Unit Notes – 25 – – – 6 – ns – 60 – ns – 50 – ns 75K 60 75K ns -60 ...
Page 7
... If nei- AWD CAA CAC CAP Rising input Alliance Semiconductor AS4LC256K16EO (min) GND and V (max and greater than the spec- ...
Page 8
... Upper byte read cycle waveform 5$6 8&$6 /&$6 Address :( 2( Upper I/O Lower I/O Lower byte read cycle waveform 5$6 /&$6 8&$6 Address :( 2( Upper I/O Lower I/O 2/25/02; V.1.2 ® Alliance Semiconductor AS4LC256K16EO ...
Page 9
... Early write cycle waveform 5$6 8&$6 /&$6 Address :( 2( I/O Upper byte early write cycle waveform 5$6 Address 8&$6 /&$ Upper I/O Lower I/O 2/25/02; V.1.2 ® Alliance Semiconductor AS4LC256K16EO ...
Page 10
... Lower byte early write cycle waveform 5$6 Address 8&$6 /&$ Upper I/O Lower I/O Write cycle waveform 5$6 8&$6 /&$6 Address :( 2( I/O 2/25/02; V.1.2 ® Alliance Semiconductor AS4LC256K16EO (OE controlled ...
Page 11
... Upper byte write cycle waveform 5$6 Address 8&$6 /&$ Upper I/O Lower I/O Lower byte write cycle waveform RAS Address LCAS UCAS WE OE Upper I/O Lower I/O 2/25/02; V.1.2 ® Alliance Semiconductor AS4LC256K16EO (OE controlled) (OE controlled ...
Page 12
... Read-modify-write cycle waveform 5$6 8&$6 /&$6 Address :( 2( I/O 2/25/02; V.1.2 ® Alliance Semiconductor AS4LC256K16EO ...
Page 13
... Upper byte read-modify-write cycle waveform 5$6 8&$6 /&$6 Address :( 2( Upper Input Upper Output Lower Input Lower Output 2/25/02; V.1.2 ® Alliance Semiconductor AS4LC256K16EO ...
Page 14
... Lower byte read-modify-write cycle waveform 5$6 8&$6 /&$6 Address :( 2( Upper Input Upper Output Lower Input Lower Output 2/25/02; V.1.2 ® Alliance Semiconductor AS4LC256K16EO ...
Page 15
... EDO page mode read cycle waveform 5$6 8&$6 /&$6 Address :( 2( I/O EDO page mode byte read cycle waveform 5$6 8&$6 /&$6 Address :( 2( Lower I/O Upper I/O 2/25/02; V.1.2 ® W $6& &RO $GGUHVV W &$& Alliance Semiconductor AS4LC256K16EO ...
Page 16
... EDO page mode early write cycle waveform 5$6 8&$6 /&$6 Address :( 2( I/O EDO page mode byte early write cycle waveform 5$6 8&$6 /&$6 Address :( 2( Lower I/O Upper I/O 2/25/02; V.1.2 ® Alliance Semiconductor AS4LC256K16EO ...
Page 17
... EDO page mode read-modify-write cycle waveform 5$6 8&$6 /&$6 Address :( 2( I/O CAS-before-RAS refresh cycle waveform 5$6 8&$6 /&$6 I/O RAS only refresh cycle waveform 5$6 8&$6 /&$6 Address 2/25/02; V.1.2 ® Alliance Semiconductor AS4LC256K16EO ( ( ...
Page 18
... EDO page mode byte read-modify-write cycle 5$6 8&$6 /&$6 Address :( 2( W Upper Input Upper Output Lower Input Lower Output 2/25/02; V.1.2 ® 2(' Alliance Semiconductor AS4LC256K16EO ...
Page 19
... Hidden refresh cycle (read) waveform 5$6 &$6 Address :( 2( I/O Hidden refresh cycle (write) waveform 5$6 8&$6 /&$6 Address :( I/O 2( 2/25/02; V.1.2 ® Alliance Semiconductor AS4LC256K16EO ...
Page 20
... CAS-before-RAS refresh counter test cycle waveform 5$6 8&$6 /&$6 Address I I I/O 2/25/02; V.1.2 ® Alliance Semiconductor AS4LC256K16EO W 52 ...
Page 21
... Ambient temperature (°C) Typical supply current I vs. ambient temperature 0.0 –55 – 3.9 Ambient temperature (°C) Alliance Semiconductor AS4LC256K16EO Typical access time t 5$& vs. load capacitance C D 100 100 150 200 125 Load capacitance (pF) Typical power-on current I & ...
Page 22
... Output voltage (V) Typical EDO page mode current I && vs. supply voltage V D && 0.0 2.7 3.0 3.3 3.6 80 Supply voltage (V) Alliance Semiconductor AS4LC256K16EO 7\SLFDO 77/ VWDQGE\ FXUUHQW , YV VXSSO\ YROWDJH 9 && 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 2.7 3.0 3.3 3.6 80 Typical output source current I 2/ vs. output voltage ...
Page 23
... 0–5° ƒ MHz, T Symbol Signals IN1 C RAS, UCAS, LCAS, WE, OE IN2 C I/O0 to I/O15 I/O Alliance Semiconductor AS4LC256K16EO 44-pin TSOP 2 Min Max (mm) (mm) A 1 0.95 1.05 2 0.45 b 0.30 c 0.127 (typical) 18.54 D 18.28 E 10.03 10.29 H 11.56 11. ...
Page 24
... Plastic SOJ, 400 mil, 40-pin TSOP 2, 400 mil, 40/44-pin AS4LC256K16EO-45TC Part numbering system AS4LC 256K16E0 3.3V DRAM prefix Device number 2/25/02; V.1.2 ® AS4LC256K16E0-45JC AS4LC256K16E0-50JC AS4LC256K16EO-50TC –XX Package SOJ RAS access time T = TSOP 2 Alliance Semiconductor AS4LC256K16EO AS4LC256K16EO-60JC AS4LC256K16EO-60TC X C Commercial temperature range, 0° ...