S29GL256M11FFIR10 Advanced Micro Devices, S29GL256M11FFIR10 Datasheet

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S29GL256M11FFIR10

Manufacturer Part Number
S29GL256M11FFIR10
Description
Flash Memory IC; Memory Size:256Mbit; Access Time, Tacc:120ns; Package/Case:64-BGA; Leaded Process Compatible:Yes; Supply Voltage:3V
Manufacturer
Advanced Micro Devices
Datasheet

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S29GL-A MirrorBit™ Flash Family
S29GL064A, S29GL032A, and S29GL016A
64 Megabit, 32 Megabit, and 16 Megabit
3.0-Volt only Page Mode Flash Memory
Featuring 200 nm MirrorBit Process Technology
Data Sheet
Notice to Readers: The Advance Information status indicates that this
document contains information on one or more products under development
at Spansion LLC. The information is intended to help you evaluate this product.
Do not design in this product without contacting the factory. Spansion LLC
reserves the right to change or discontinue work on this proposed product
without notice.
Publication Number S29GL-A_00
Revision A
Amendment 3
Issue Date April 22, 2005
INFORMATION
ADVANCE

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S29GL256M11FFIR10 Summary of contents

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S29GL-A MirrorBit™ Flash Family S29GL064A, S29GL032A, and S29GL016A 64 Megabit, 32 Megabit, and 16 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 200 nm MirrorBit Process Technology Data Sheet Notice to Readers: The Advance Information status indicates that this document ...

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Notice On Data Sheet Designations Spansion LLC issues data sheets with Advance Information or Preliminary designations to advise readers of product information or intended specifications throughout the product life cycle, in- cluding development, qualification, initial production, and full production. In ...

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S29GL-A MirrorBit™ Flash Family S29GL064A, S29GL032A, and S29GL016A 64 Megabit, 32 Megabit, and 16 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 200 nm MirrorBit Process Technology Data Sheet Distinctive Characteristics Architectural Advantages Single power supply operation — 3 volt ...

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General Description The S29GL-A family of devices are 3.0 V single power Flash memory manufac- tured using 200 nm MirrorBit technology. The S29GL064A is a 64-Mb device organized as 4,194,304 words or 8,388,608 bytes. The S29GL032A is a 32-Mb device ...

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vice, enabling the host system to read boot-up firmware from the Flash memory device. The device reduces power consumption in the standby mode when it detects specific voltage levels on CE# and RESET#, ...

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Table of Contents Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6 S29GL064A, S29GL032A, S29GL016A .............................................................6 Block Diagram . . . . . . ...

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Figure 16. Program Operation Timings .................................... 75 Figure 17. Accelerated Program Timing Diagram....................... 75 Figure 18. Chip/Sector Erase Operation Timings ....................... 76 Figure 19. Data# Polling Timings (During Embedded Algorithms) .............................................. 76 Figure ...

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Product Selector Guide S29GL064A, S29GL032A, S29GL016A Part Number Speed Option 90 Max. Access Time (ns) 90 Max. CE# Access Time (ns) 90 Max. Page Access Time (ns) 25 Max. OE# Access Time (ns ...

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Block Diagram RY/BY RESET# WE# State Control WP#/ACC BYTE# Command Register CE# OE# V Detector CC A **–A0 Max Note: **A GL064A = A21. MAX **A GL032A = A20. ...

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Connection Diagrams A15 1 A14 2 A13 3 A12 4 A11 5 A10 A19 A20 10 WE# 11 RESET# 12 1,2 A21 13 1 WP#/ACC 14 RY/BY A18 16 A17 ...

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A13 A12 WE# RESET RY/BY# WP#/ACC A17 Notes: ...

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A6 A13 A12 WE# RESET# A3 RY/BY# WP#/ACC A2 A7 A17 A1 A3 Notes: 1. Ball S29GL064A (model R5 Ball S29GL032A and S29GL016A. 3. Ball D3 is ...

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Pin Descriptions A21–A0 A20–A0 A19–A0 DQ7–DQ0 DQ14–DQ0 DQ15/A-1 CE# OE# WE# WP#/ACC ACC WP# RESET# RY/BY# BYTE Logic Symbols Logic Symbol–S29GL064A (Models R1, R2, R8, R9) ...

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Logic Symbol–S29GL064A (Models R3, R4) Logic Symbol–S29GL064A (Model R5) Logic Symbol–S29GL064A (Models R6, R7 A21– DQ15–DQ0 CE# ...

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Logic Symbol–S29GL032A (Models R1, R2) Logic Symbol–S29GL032A (Models R3, R4) Logic Symbol–S29GL016A (Models R1, R2) April 22, 2005 S29GL-A_00_A3 A20–A0 16 ...

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Ordering Information–S29GL016A S29GL016A Standard Products Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: S29GL016A DEVICE NUMBER/DESCRIPTION S29GL016A 3.0 Volt-only, 16 Megabit ...

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Ordering Information–S29GL032A S29GL032A Standard Products Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: S29GL032A ...

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Ordering Information–S29GL064A S29GL064A Standard Products Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: S29GL064A DEVICE NUMBER/DESCRIPTION S29GL064A, 64 Megabit Page-Mode Flash ...

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S29GL064A Valid Combinations Package, Material & Device Number Speed Option Temperature Range S29GL064A 90, 10, 11 Notes: 1. Type 0 is standard. Specify others as required: TSOPs can be packed in Types 0 ...

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Device Bus Operations This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command regis- ter itself does not occupy any addressable memory location. The register is a latch ...

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Word/Byte Configuration The BYTE# pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE# pin is set at logic 1, the device is in word ...

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An erase operation can erase one sector, multiple sectors, or the entire device. Tables 7 – 25 indicate the address space that each sector occupies. Refer to the DC Characteristics table for the active current specification for the write mode. ...

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Automatic Sleep Mode The automatic sleep mode minimizes Flash device energy consumption. The de- vice automatically enables this mode when addresses remain stable for t 30 ns. The automatic sleep mode is independent ...

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Table 5. S29GL016A (Model R1) Top Boot Sector Addresses Sector 8-bit Size Sector A19–A12 Address (KB/ Range Kwords) SA0 000000xxx 64/32 000000h–00FFFFh SA1 000001xxx 64/32 010000h–01FFFFh SA2 000010xxx 64/32 020000h–02FFFFh SA3 000011xxx 64/32 030000h–03FFFFh SA4 000100xxx 64/32 040000h–04FFFFh SA5 000101xxx ...

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Table 7. S29GL032A (Models R1, R2) Sector Addresses Sector 8-bit Size Sector A20-A15 Address (KB/ Range Kwords) SA0 64/32 000000–00FFFF SA1 ...

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Table 8. S29GL032A (Model R3) Top Boot Sector Addresses Sector 8-bit Size Sector A20–A12 Address (KB/ Range Kwords) SA0 000000xxx 64/32 000000h–00FFFFh SA1 000001xxx 64/32 010000h–01FFFFh SA2 000010xxx 64/32 020000h–02FFFFh SA3 000011xxx 64/32 030000h–03FFFFh SA4 000100xxx 64/32 040000h–04FFFFh SA5 000101xxx ...

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Table 9. S29GL032A (Model R4) Bottom Boot Sector Addresses (Sheet Sector 8-bit Size Sector A20–A12 Address (KB/ Range Kwords) SA38 011111xxx 64/32 1F0000h–1FFFFFh SA39 100000xxx 64/32 200000h–20FFFFh SA40 100001xxx 64/32 ...

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Table 10. S29GL064A (Models R1, R2, R8, R9) Sector Addresses (Sheet Sector 8-bit Size Sector A21–A15 Address (KB/ Range Kwords) SA74 1001010 64/32 4A0000–4AFFFF SA75 1001011 64/32 4B0000–4BFFFF SA76 1001100 64/32 4C0000–4CFFFF SA77 1001101 64/32 4D0000–4DFFFF SA78 ...

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Table 11. S29GL064A (Model R3) Top Boot Sector Addresses (Sheet Sector 8-bit Size Sector A21–A15 Address (KB/ Range Kwords) SA68 1000100xxx 64/32 440000h–44FFFFh 220000h–227FFFh SA102 1100110xxx SA69 1000101xxx 64/32 450000h–45FFFFh ...

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Table 12. S29GL064A (Model R4) Bottom Boot Sector Addresses (Sheet Sector 8-bit Size A21–A15 Address (KB/ Range Kwords) SA55 0110000xxx 64/32 300000h–30FFFFh SA56 0110001xxx 64/32 310000h–31FFFFh SA57 0110010xxx 64/32 320000h–32FFFFh SA58 0110011xxx 64/32 330000h–33FFFFh SA59 0100100xxx 64/32 ...

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Table 13. S29GL064A (Model R5) Sector Addresses (Sheet Sector A21–A15 SA43 0101011 SA44 0101100 SA45 0101101 SA46 0101110 SA47 0101111 SA48 0110000 SA49 0110001 SA50 0110010 SA51 0110011 SA52 0110100 ...

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Table 14. S29GL064A (Models R6, R7) Sector Addresses (Sheet Sector A21–A15 SA43 0101011 SA44 0101100 SA45 0101101 SA46 0101110 SA47 0101111 SA48 0110000 SA49 0110001 SA50 0110010 SA51 0110011 SA52 0110100 SA53 0110101 SA54 0110110 SA55 0110111 ...

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Table 31 on page Command Sequence section for more information. Table 15. Autoselect Codes, (High Voltage Method) A22 A14 Description CE# OE# WE A15 A10 Manufacturer ID ...

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Table 16. S29GL016A (Model R1) Sector Group Protection/Unprotection Addresses Sector A19–A12 SA0-SA3 000XXXXXh SA4-SA7 001XXXXXh SA8-SA11 010XXXXXh SA12-SA15 011XXXXXh SA16-SA19 100XXXXXh SA20-SA23 101XXXXXh SA24-SA27 110XXXXXh 11100XXXh SA28-SA30 11101XXXh 11110XXXh Table 17. S29GL016A (Model R2) Sector Group Protection/Unprotection Addresses Sector A19–A12 ...

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Table 20. S29GL032A (Model R4) Sector Group Protection/Unprotection Address Table Sector/Sector Sector A20–A12 Block Size (Kbytes) SA0 000000000h 8 SA1 000000001h 8 SA2 000000010h 8 SA3 000000011h 8 SA4 000000100h 8 SA5 000000101h ...

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Table 23. S29GL064A (Model R4) Bottom Boot Sector Protection/Unprotection Addresses Sector/Sector Sector A21–A12 Block Size (Kbytes) SA0 0000000000 8 SA1 0000000001 8 SA2 0000000010 8 SA3 0000000011 8 SA4 0000000100 8 SA5 0000000101 8 SA6 0000000110 8 SA7 0000000111 8 ...

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Temporary Sector Group Unprotect This feature allows temporary unprotection of previously protected sector groups to change data in-system. The Sector Group Unprotect mode is activated by setting the RESET# pin to V groups ...

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START PLSCNT = 1 RESET Wait 1 µs Temporary Sector No First Write Group Unprotect Cycle = 60h? Mode Yes Set up sector group address Sector Group Protect: Write 60h to sector group address with A6–A0 = ...

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Secured Silicon Sector Flash Memory Region The Secured Silicon Sector feature provides a Flash memory region that enables permanent part identification through an Electronic Serial Number (ESN). The Secured Silicon Sector is 256 ...

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Write the three-cycle Enter Secured Silicon Sector Region command se- quence, and then follow the in-system sector protect algorithm as shown in Figure 2, on page allows in-system protection of the Secured Silicon Sector without raising any device pin to ...

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all internal program/erase circuits are disabled, and the device resets to the read mode. Subsequent writes are ignored until V must provide the proper signals to the control pins to prevent unintentional writes ...

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Addresses Addresses (x16) (x8) 10h 20h 11h 22h 12h 24h 13h 26h 14h 28h 15h 2Ah 16h 2Ch 17h 2Eh 18h 30h 19h 32h 1Ah 34h Addresses Addresses (x16) (x8) 1Bh 36h 1Ch 38h 1Dh 3Ah 1Eh 3Ch 1Fh 3Eh ...

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Addresses (x16) Addresses (x8) 27h 4Eh 28h 50h 29h 52h 2Ah 54h 2Bh 56h 2Ch 58h 2Dh 5Ah 2Eh 5Ch 2Fh 5Eh 30h 60h 31h 60h 32h 64h 33h 66h 34h 68h 35h ...

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Table 29. Primary Vendor-Specific Extended Query Addresses Addresses (x16) (x8) 40h 80h 41h 82h 42h 84h 43h 86h 44h 88h 45h 8Ah 46h 8Ch 47h 8Eh 48h 90h 49h 92h 4Ah 94h 4Bh 96h 4Ch 98h 4Dh 9Ah 4Eh 9Ch ...

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Command Definitions Writing specific address and data commands or sequences into the command register initiates device operations. page 55 define the valid register command sequences. Writing incorrect address and data values or writing ...

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If DQ5 goes high during a program or erase operation, writing the reset com- mand returns the device to the read mode (or erase-suspend-read mode if the device was in Erase Suspend). Note that if DQ1 goes high during a ...

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When the Embedded Program algorithm is complete, the device then returns to the read mode and addresses are no longer latched. The system can determine the status of the program operation by using ...

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For example, if the system programs six unique address locations, then 05h should be written to the device. This tells the device how many write ...

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address range without intervening erases. For applications requiring incremental bit programming, a modified programming method is required; please contact your local Spansion representative. Any bit in a write buffer address range cannot be ...

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No DQ1 = 1? Yes (Note 3) Notes: 1. When Sector Address is specified, any address in the selected sector is acceptable. However, when loading Write-Buffer address locations with data, all addresses must fall within the selected Write-Buffer ...

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Increment Address Note: See Table 30 on page 54 Program Suspend/Program Resume Command Sequence The Program Suspend command allows the system to interrupt a programming operation or a Write to Buffer programming operation ...

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DQ7 or DQ6 status bits, just as in the standard program operation. See Operation Status on page 56 The system must write the Program Resume command (address bits are don’t care) to exit the Program Suspend mode and continue the ...

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occurs, the chip erase command sequence should be reinitiated once the device returns to reading array data, to ensure data integrity. Figure 6, on page 52 Table 38 on page 70 diagrams. Sector ...

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Notes: 1.See 2.See the section on DQ3 for information on the sector erase timer. Erase Suspend/Erase Resume Commands The Erase Suspend command, B0h, allows the system to interrupt a sector erase operation and then read data from, or program data ...

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After an erase-suspended program operation is complete, the device returns to the erase-suspend-read mode. The system can determine the status of the pro- gram operation using the DQ7 or DQ6 status bits, just ...

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Command Definitions Table 30. Command Definitions (x16 Mode, BYTE Command Sequence (Note 1) Read (Note 5) Reset (Note 6) Manufacturer ID Device ID (Note 8) Device ID (Note 9) Secured Silicon Sector Factory Protect Sector Group Protect Verify ...

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Table 31. Command Definitions (x8 Mode, BYTE Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Manufacturer ID 4 Device ID (Note 9) 6 Device ID(Note 10) 4 ...

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Write Operation Status The device provides several bits to determine the status of a program or erase operation: DQ2, DQ3, DQ5, DQ6, and DQ7. ing subsections describe the function of these bits. DQ7 and DQ6 each offer a method for ...

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Notes Valid address for programming. During a sector erase operation, a valid address is any sector address within the sector being erased. During chip erase, a valid address is any ...

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DQ6: Toggle Bit I Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete, or whether the device entered the Erase Suspend mode. Toggle Bit I may be read at any address, ...

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Note: The system should recheck the toggle bit even if DQ5 = 1 because the toggle bit may stop toggling as DQ5 changes to 1. See the subsections on DQ6 and DQ2 for ...

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DQ2: Toggle Bit II The “Toggle Bit II” on DQ2, when used with DQ6, indicates whether a particular sector is actively erasing (that is, the Embedded Erase algorithm is in progress), or whether that sector is erase-suspended. Toggle Bit II ...

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all these cases, the system must write the reset command to return the device to the reading the array (or to erase-suspend-read if the device was previously in the erase-suspend-program mode). DQ3: ...

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Absolute Maximum Ratings Storage Temperature, Plastic Packages . . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied . . . . . . . . . ...

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Operating Ranges Industrial (I) Devices Ambient Temperature (T Supply Voltages V for full voltage range . . . . . . . . . . . . . . . . . . ...

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DC Characteristics CMOS Compatible Parameter Parameter Description (Notes) Symbol I Input Load Current (Note A9, ACC Input Load Current LIT I Reset Leakage Current LR I Output Leakage Current Initial Read Current (Notes CC1 ...

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Test Conditions Device Output Load Output Load Capacitance, C (including jig capacitance) Input Rise and Fall Times Input Pulse Levels Input timing measurement reference levels (See Note) Output timing measurement reference levels Key ...

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AC Characteristics Table 34. Read-Only Operations-S29GL064A Only Parameter JEDEC Std Read Cycle Time (Note AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV CE t Page Access Time PACC ...

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Table 36. Read-Only Operation-S29GL016A Only Parameter JEDEC Std Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t ELQV CE Chip Enable to Output ...

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A23-A2 A1-A0* Data Bus CE# OE# Note: * Figure shows device in word mode. Addresses are A1–A-1 for byte mode. Parameter JEDEC Std. t RESET# Pin Low (During Embedded Algorithms) to Read Mode Ready t RESET# Pin Low (NOT During ...

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RY/BY# CE#, OE# RESET# RY/BY# CE#, OE# RESET# Notes: 1. Not 100% tested. 2. See the Erase And Programming Performance on page 81 3. For 1–16 words/1–32 bytes programmed. April 22, 2005 S29GL-A_00_A3 ...

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Table 38. Erase and Program Operations-S29GL064A Parameter JEDEC Std Write Cycle Time AVAV AVWL AS Address Setup Time t Address Setup Time to OE# low during toggle bit polling ASO t t Address Hold Time ...

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Table 39. Erase and Program Operations-S29GL032A Only Parameter JEDEC Std Write Cycle Time (Note AVAV Address Setup Time AVWL AS t ASO Address Setup Time to OE# low ...

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Table 40. Erase and Program Operations-S29GL016A Only Parameter JEDEC Std Write Cycle Time AVAV Address Setup Time AVWL AS t ASO Address Setup Time to OE# low during toggle bit polling t t Address Hold ...

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Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY VCS Notes program address program data ...

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Erase Command Sequence (last two cycles Addresses 2AAh CE# OE Data RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid Address for reading status data (see ...

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Addresses CE# t OEH WE# OE Valid Data DQ6 / DQ2 RY/BY# Note Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last ...

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V ID RESET VIDR CE# WE# RY/BY# Figure 22. Temporary Sector Group Unprotect Timing Diagram RESET# SA, A6, A3, A2, A1, A0 Sector Group Protect or ...

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Table 42. Alternate CE# Controlled Erase and Program Operations-S29GL064A Parameter JEDEC Std Write Cycle Time AVAV Address Setup Time AVWL Address Hold Time ELAX AH ...

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Table 43. Alternate CE# Controlled Erase and Program Operations-S29GL032A Parameter JEDEC Std Write Cycle Time AVAV Address Setup Time AVWL ELAX AH Address Hold Time t t Data Setup Time DVEH DS ...

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Table 44. Alternate CE# Controlled Erase and Program Operations-S29GL016A Parameter JEDEC Std Write Cycle Time AVAV Address Setup Time AVWL ELAX AH Address Hold Time ...

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PBA for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes: 1. Figure indicates last two bus cycles of a program or erase operation program address, ...

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Erase And Programming Performance Parameter Sector Erase Time Chip Erase Time Total Write Buffer Program Time (Notes Total Accelerated Effective Write Buffer Program Time (Notes 4, 5) Chip Program Time Notes: 1. Typical ...

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Physical Dimensions TS048—48-Pin Standard Thin Small Outline Package (TSOP) STANDARD PIN OUT (TOP VIEW SEE DETAIL B SEE DETAIL B - SEE DETAIL A SEE DETAIL A R 0˚ PARALLEL TO L ...

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TS056—56-Pin Standard Thin Small Outline Package (TSOP) STANDARD PIN OUT (TOP VIEW SEE DETAIL 0. (N/2 TIPS) B SEE DETAIL A ...

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LAA064—64-Ball Fortified Ball Grid Array (BGA S29GL-A MirrorBit™ Flash Family S29GL-A_00_A3 April 22, 2005 ...

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VBN048—48-Ball Fine-pitch Ball Grid Array (BGA) 10x 6 mm Package D Ø0.50 +0.20 1.00 A1 ID. -0.50 A SEATING PLANE A1 PACKAGE VBN 048 JEDEC N/A 10. 6.00 mm NOM PACKAGE ...

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VBK048—Ball Fine-pitch Ball Grid Array (BGA) 8.15x 6.15 mm Package D INDEX MARK PIN A1 CORNER 10 TOP VIEW A SEATING PLANE A1 SIDE VIEW PACKAGE VBK 048 JEDEC N/A 8. 6.15 mm NOM PACKAGE SYMBOL MIN NOM ...

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Revision Summary Revision A (October 13, 2004) Initial Release. Revision A1 (December 17, 2004)s Secured Silicon Sector Flash Memory Region Updated Secured Silicon Sector address table with addresses in x8-mode. DC Characteristics (CMOS ...

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