AT32UC3A364 Atmel Corporation, AT32UC3A364 Datasheet - Page 262

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AT32UC3A364

Manufacturer Part Number
AT32UC3A364
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A364

Flash (kbytes)
64 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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262
AVR32
PADDSUB.H – Packed Halfword Addition and Subtraction
Architecture revision:
Architecture revision1 and higher.
Description
Perform an addition and subtraction on the same halfword operands which are selected from the
source registers. The two halfword results are packed into the destination register without per-
forming any saturation.
Operation:
I.
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
31
1
15
0
If (Rx-part == t) then operand1 = Rx[31:16] else operand1 = Rx[15:0];
If (Ry-part == t) then operand2 = Ry[31:16] else operand2 = Ry[15:0];
Rd[31:16] ← operand1 + operand2;
Rd[15:0] ← operand1 - operand2;
paddsub.h
{d, x, y} ∈ {0, 1, …, 15}
part ∈ {t,b}
Q:
V:
N:
Z:
C:
Format I:
1
0
29
1
1
Not affected.
Not affected.
Not affected.
Not affected.
Not affected.
28
0
Rd, Rx:<part>, Ry:<part>
0
Rx
0
25
0
24
0
1
0
0
6
0
0
5
0
X
4
20
0
Y
3
19
Ry
Rd
32000D–04/2011
0
16

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