AT90CAN64 Atmel Corporation, AT90CAN64 Datasheet - Page 12

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AT90CAN64

Manufacturer Part Number
AT90CAN64
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT90CAN64

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
8
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
2
Can
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
8
Input Capture Channels
2
Pwm Channels
7
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Notes:
12
0x1A (0x3A)
0x0E (0x2E)
0x0D (0x2D)
0x0C (0x2C)
0x0B (0x2B)
0x0A (0x2A)
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
Address
1. Address bits exceeding PCMSB
2. Address bits exceeding EEAMSB
3. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
4. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
5. Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
6. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
AT90CAN32/64/128
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such status flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The AT90CAN32/64/128 is
a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for
the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and
LD/LDS/LDD instructions can be used.
Reserved
Reserved
PORTG
PORTF
PORTE
PORTD
PORTC
PORTB
PORTA
Name
DDRG
TIFR3
TIFR2
TIFR1
TIFR0
DDRF
DDRE
DDRD
DDRC
DDRB
DDRA
PING
PINE
PIND
PINC
PINB
PINA
PINF
PORTE7
PORTD7
PORTC7
PORTB7
PORTA7
PORTF7
PINF7
PINE7
PIND7
PINC7
PINB7
PINA7
DDF7
DDE7
DDD7
DDC7
DDB7
DDA7
Bit 7
PORTD6
PORTC6
PORTF6
PORTE6
PORTB6
PORTA6
PINE6
PIND6
PINC6
PINB6
PINA6
PINF6
DDE6
DDD6
DDC6
DDB6
DDA6
Bit 6
DDF6
(Table 25-11 on page
(Table 25-12 on page
PORTF5
PORTE5
PORTD5
PORTC5
PORTB5
PORTA5
PINE5
PIND5
PINC5
PINB5
PINA5
PINF5
DDD5
DDC5
Bit 5
DDF5
DDE5
DDB5
DDA5
ICF3
ICF1
PORTG4
PORTF4
PORTE4
PORTD4
PORTC4
PORTB4
PORTA4
PING4
PIND4
PINC4
DDG4
PINF4
PINE4
DDD4
DDC4
PINB4
PINA4
Bit 4
DDF4
DDE4
DDB4
DDA4
341) are don’t care.
341) are don’t care.
PORTG3
PORTE3
PORTD3
PORTC3
PORTB3
PORTA3
PORTF3
OCF3C
OCF1C
PING3
PINF3
PINE3
PIND3
PINC3
PINB3
PINA3
DDG3
DDF3
DDE3
DDD3
DDC3
DDB3
DDA3
Bit 3
PORTG2
PORTD2
PORTC2
PORTF2
PORTE2
PORTB2
PORTA2
OCF3B
OCF1B
PING2
PINE2
PIND2
PINC2
PINB2
PINA2
DDG2
PINF2
DDE2
DDD2
DDC2
DDB2
DDA2
Bit 2
DDF2
PORTG1
PORTF1
PORTE1
PORTD1
PORTC1
PORTB1
PORTA1
OCF3A
OCF2A
OCF1A
OCF0A
PING1
PIND1
PINC1
DDG1
PINF1
PINE1
PINB1
PINA1
DDF1
DDE1
DDD1
DDC1
DDB1
DDA1
Bit 1
PORTG0
PORTF0
PORTE0
PORTD0
PORTC0
PORTB0
PORTA0
PING0
PINE0
PIND0
PINC0
PINB0
PINA0
DDG0
PINF0
DDE0
DDD0
DDC0
DDB0
DDA0
Bit 0
TOV3
TOV2
TOV1
TOV0
DDF0
7679HS–CAN–08/08
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