ATmega164P Automotive Atmel Corporation, ATmega164P Automotive Datasheet - Page 39

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ATmega164P Automotive

Manufacturer Part Number
ATmega164P Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega164P Automotive

Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
7.12
7.12.1
7674F–AVR–09/09
Register Description
OSCCAL – Oscillator Calibration Register
When switching between prescaler settings, the System Clock Prescaler ensures that no
glitches occurs in the clock system. It also ensures that no intermediate frequency is higher than
neither the clock frequency corresponding to the previous setting, nor the clock frequency corre-
sponding to the new setting.
The ripple counter that implements the prescaler runs at the frequency of the undivided clock,
which may be faster than the CPU's clock frequency. Hence, it is not possible to determine the
state of the prescaler - even if it were readable, and the exact time it takes to switch from one
clock division to the other cannot be exactly predicted. From the time the CLKPS values are writ-
ten, it takes between T1 + T2 and T1 + 2 * T2 before the new clock frequency is active. In this
interval, 2 active clock edges are produced. Here, T1 is the previous clock period, and T2 is the
period corresponding to the new prescaler setting.
To avoid unintentional changes of clock frequency, a special write procedure must be followed
to change the CLKPS bits:
1. Write the Clock Prescaler Change Enable (CLKPCE) bit to one and all other bits in
2. Within four cycles, write the desired value to CLKPS while writing a zero to CLKPCE.
Interrupts must be disabled when changing prescaler setting to make sure the write procedure is
not interrupted.
• Bits 7:0 – CAL7:0: Oscillator Calibration Value
The Oscillator Calibration Register is used to trim the Calibrated Internal RC Oscillator to
remove process variations from the oscillator frequency. A pre-programmed calibration value is
automatically written to this register during chip reset, giving the Factory calibrated frequency as
specified in
the oscillator frequency. The oscillator can be calibrated to frequencies as specified in
26-2 on page
Note that this oscillator is used to time EEPROM and Flash write accesses, and these write
times will be affected accordingly. If the EEPROM or Flash are written, do not calibrate to more
than 8.8 MHz. Otherwise, the EEPROM or Flash write may fail.
The CAL7 bit determines the range of operation for the oscillator. Setting this bit to 0 gives the
lowest frequency range, setting this bit to 1 gives the highest frequency range. The two fre-
quency ranges are overlapping, in other words a setting of OSCCAL = 0x7F gives a higher
frequency than OSCCAL = 0x80.
The CAL6..0 bits are used to tune the frequency within the selected range. A setting of 0x00
gives the lowest frequency in that range, and a setting of 0x7F gives the highest frequency in the
range.
Bit
(0x66)
Read/Write
Initial Value
CLKPR to zero.
Table 26-2 on page
331. Calibration outside that range is not guaranteed.
CAL7
R/W
7
CAL6
R/W
6
331. The application software can write this register to change
CAL5
R/W
5
Device Specific Calibration Value
CAL4
R/W
4
ATmega164P/324P/644P
CAL3
R/W
3
CAL2
R/W
2
CAL1
R/W
1
CAL0
R/W
0
OSCCAL
Table
39

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