ATmega165PA Atmel Corporation, ATmega165PA Datasheet - Page 8

• Manufacturer Part Number: ATmega165PA
• Manufacturer: Atmel Corporation

Specifications of ATmega165PA

• Flash (kbytes): 16 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 17
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

2.3.10
2.3.11
2.3.12
2.3.13
2.3.14
2.3.15
2.3.16
8285DS–AVR–06/11
Port H (PH7:PH0)
Port J (PJ6:PJ0)
RESET
XTAL1
XTAL2
AVCC
AREF
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
Port G also serves the functions of various special features of the
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P as listed on
84.
Port H is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port H output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port H pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port H pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
P o r t H a l s o s e r v e s t h e f u n c t i o n s o f v a r i o u s s p e c i a l f e a t u r e s o f t h e
ATmega3250A/3250PA/6450A/6450P as listed on
Port J is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port J output buffers have symmetrical drive characteristics with both high sink and source capa-
bility. As inputs, Port J pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port J pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
P o r t J a l s o s e r v e s t h e f u n c t i o n s o f v a r i o u s s p e c i a l f e a t u r e s o f t h e
ATmega3250A/3250PA/6450A/6450P as listed on
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in
328. Shorter pulses are not guaranteed to generate a reset.
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting Oscillator amplifier.
AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con-
nected to V
through a low-pass filter.
This is the analog reference pin for the A/D Converter.
CC
, even if the ADC is not used. If the ADC is used, it should be connected to V
page
page
85.
87.
Table 28-13 on page
page
CC
8