ATmega168

Manufacturer Part NumberATmega168
ManufacturerAtmel Corporation
ATmega168 datasheets
 


Specifications of ATmega168

Flash (kbytes)16 KbytesPin Count32
Max. Operating Frequency20 MHzCpu8-bit AVR
# Of Touch Channels16Hardware Qtouch AcquisitionNo
Max I/o Pins23Ext Interrupts24
Usb SpeedNoUsb InterfaceNo
Spi2Twi (i2c)1
Uart1Graphic LcdNo
Video DecoderNoCamera InterfaceNo
Adc Channels8Adc Resolution (bits)10
Adc Speed (ksps)15Analog Comparators1
Resistive Touch ScreenNoTemp. SensorNo
Crypto EngineNoSram (kbytes)1
Eeprom (bytes)512Self Program MemoryYES
Dram MemoryNoNand InterfaceNo
PicopowerNoTemp. Range (deg C)-40 to 85
I/o Supply Class1.8 to 5.5Operating Voltage (vcc)1.8 to 5.5
FpuNoMpu / Mmuno / no
Timers3Output Compare Channels6
Input Capture Channels1Pwm Channels6
32khz RtcYesCalibrated Rc OscillatorYes
1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
8
Page 8
9
Page 9
10
Page 10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Page 1/36

Download datasheet (495Kb)Embed
Next
Features
High performance, low power Atmel
Advanced RISC architecture
– 131 powerful instructions – most single clock cycle execution
– 32 × 8 general purpose working registers
– Fully static operation
– Up to 20 MIPS throughput at 20MHz
– On-chip 2-cycle multiplier
High endurance non-volatile memory segments
– 4/8/16 Kbytes of in-system self-programmable flash program memory
– 256/512/512 bytes EEPROM
– 512/1K/1Kbytes internal SRAM
– Write/erase cyles: 10,000 flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
– Optional boot code section with independent lock bits
In-system programming by on-chip boot program
True read-while-write operation
– Programming lock for software security
®
QTouch
library support
– Capacitive touch buttons, sliders and wheels
– QTouch and QMatrix acquisition
Up to 64 sense channels
Peripheral features
– Two 8-bit timer/counters with separate prescaler and compare mode
– One 16-bit timer/counter with separate prescaler, compare mode, and capture mode
– Real time counter with separate oscillator
– Six PWM channels
– 8-channel 10-bit ADC in TQFP and QFN/MLF package
– 6-channel 10-bit ADC in PDIP Package
– Programmable serial USART
– Master/slave SPI serial interface
– Byte-oriented 2-wire serial interface (Philips I
– Programmable watchdog timer with separate on-chip oscillator
– On-chip analog comparator
– Interrupt and wake-up on pin change
Special microcontroller features
– DebugWIRE on-chip debug system
– Power-on reset and programmable brown-out detection
– Internal calibrated oscillator
– External and internal interrupt sources
– Five sleep modes: Idle, ADC noise reduction, power-save, power-down, and standby
I/O and packages
– 23 programmable I/O lines
– 28-pin PDIP, 32-lead TQFP, 28-pad QFN/MLF and 32-pad QFN/MLF
Operating voltage:
– 1.8V - 5.5V for Atmel ATmega48V/88V/168V
– 2.7V - 5.5V for Atmel ATmega48/88/168
Temperature range:
°
°
– -40
C to 85
C
Speed grade:
– ATmega48V/88V/168V: 0 - 4MHz @ 1.8V - 5.5V, 0 - 10MHz @ 2.7V - 5.5V
– ATmega48/88/168: 0 - 10MHz @ 2.7V - 5.5V, 0 - 20MHz @ 4.5V - 5.5V
Low power consumption
– Active mode:
250µA at 1MHz, 1.8V
15µA at 32kHz, 1.8V (including oscillator)
– Power-down mode:
0.1µA at 1.8V
Note:
1. See
“Data Retention” on page 7
®
®
AVR
8-bit microcontroller
()
2
C compatible)
for details.
8-bit Atmel
Microcontroller
with 4/8/16K
Bytes In-System
Programmable
Flash
ATmega48/V
ATmega88/V
ATmega168/V
Summary
Rev. 2545TS–AVR–05/11

ATmega168 Summary of contents

  • Page 1

    ... Power-down mode: 0.1µA at 1.8V Note: 1. See “Data Retention” on page 7 ® ® AVR 8-bit microcontroller () 2 C compatible) for details. 8-bit Atmel Microcontroller with 4/8/16K Bytes In-System Programmable Flash ATmega48/V ATmega88/V ATmega168/V Summary Rev. 2545TS–AVR–05/11 ...

  • Page 2

    Pin configurations Figure 1-1. Pinout Atmel ATmega48/88/1682545TS TQFP Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 GND 3 VCC 4 GND 5 VCC 6 (PCINT6/XTAL1/TOSC1) PB6 7 (PCINT7/XTAL2/TOSC2) PB7 8 28 MLF Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 ...

  • Page 3

    Pin descriptions 1.1.1 VCC Digital supply voltage. 1.1.2 GND Ground. 1.1.3 Port B (PB7:0) XTAL1/XTAL2/TOSC1/TOSC2 Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive ...

  • Page 4

    The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. The various special features of Port D are elaborated in 83. 1.1 the supply ...

  • Page 5

    Overview The Atmel ATmega48/88/168 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega48/88/168 achieves throughputs approaching 1 MIPS per MHz allowing the system designer ...

  • Page 6

    ... C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emu- lators, and Evaluation kits. 2.2 Comparison between Atmel ATmega48, Atmel ATmega88, and Atmel ATmega168 The ATmega48, ATmega88 and ATmega168 differ only in memory sizes, boot loader support, and interrupt vector sizes. for the three devices. Table 2-1. ...

  • Page 7

    ... ATmega88 and ATmega168 support a real Read-While-Write Self-Programming mechanism. There is a separate Boot Loader Section, and the SPM instruction can only execute from there. In ATmega48, there is no Read-While-Write support and no separate Boot Loader Section. The SPM instruction can execute from the entire Flash. ...

  • Page 8

    Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. 4. Data retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 ...

  • Page 9

    Register summary Address Name Bit 7 (0xFF) Reserved – (0xFE) Reserved – (0xFD) Reserved – (0xFC) Reserved – (0xFB) Reserved – (0xFA) Reserved – (0xF9) Reserved – (0xF8) Reserved – (0xF7) Reserved – (0xF6) Reserved – (0xF5) Reserved – ...

  • Page 10

    Address Name Bit 7 (0xBF) Reserved – (0xBE) Reserved – (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved – (0xB6) ASSR – (0xB5) Reserved – (0xB4) OCR2B (0xB3) OCR2A (0xB2) ...

  • Page 11

    Address Name Bit 7 (0x7D) Reserved – (0x7C) ADMUX REFS1 (0x7B) ADCSRB – (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved – (0x76) Reserved – (0x75) Reserved – (0x74) Reserved – (0x73) Reserved – (0x72) Reserved – (0x71) Reserved ...

  • Page 12

    Address Name Bit 7 0x1B (0x3B) PCIFR – 0x1A (0x3A) Reserved – 0x19 (0x39) Reserved – 0x18 (0x38) Reserved – 0x17 (0x37) TIFR2 – 0x16 (0x36) TIFR1 – 0x15 (0x35) TIFR0 – 0x14 (0x34) Reserved – 0x13 (0x33) Reserved – ...

  • Page 13

    Instruction set summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two registers ADC Rd, Rr Add with carry two registers ADIW Rdl,K Add immediate to word SUB Rd, Rr Subtract two registers SUBI Rd, K Subtract ...

  • Page 14

    Mnemonics Operands BRIE k Branch if interrupt enabled BRID k Branch if interrupt disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set bit in I/O register CBI P,b Clear bit in I/O register LSL Rd Logical shift left LSR Rd Logical ...

  • Page 15

    ... NOP No operation SLEEP Sleep WDR Watchdog reset BREAK Break Note: 1. These instructions are only available in Atmel ATmega168. 2545TS–AVR–05/11 Description Rd ← STACK (See specific descr. for sleep function) (See specific descr. for WDR/timer) For on-chip debug only ATmega48/88/168 Operation ...

  • Page 16

    Ordering information 9.1 Atmel ATmega48 Speed (MHz) Power supply (3) 10 1.8V - 5.5V (3) 20 2.7V - 5.5V Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ...

  • Page 17

    Atmel ATmega88 Speed (MHz) Power supply (3) 10 1.8V - 5.5V (3) 20 2.7V - 5.5V Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and ...

  • Page 18

    ... Atmel ATmega168 (3) Speed (MHz) Power supply 10 1.8V - 5.5V 20 2.7V - 5.5V Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging alternative, complies to the European Directive for Restriction of Hazardous Substances (RoHS direc- tive) ...

  • Page 19

    Packaging Information 10.1 32A PIN 1 IDENTIFIER C Notes: 1. This package conforms to JEDEC reference MS-026, Variation ABA. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25mm per side. Dimensions D1 and E1 ...

  • Page 20

    Pin TOP VIEW 0.20 b 0.4 Ref BOTTOM VIEW (4x) The terminal # Laser-marked Feature. Note: Package Drawing Contact: packagedrawings@atmel.com ATmega48/88/168 ...

  • Page 21

    Pin TOP VIEW Pin #1 Notch (0. BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2. 2325 Orchard Parkway San Jose, CA 95131 ...

  • Page 22

    A SEATING PLANE Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R ATmega48/88/168 22 ...

  • Page 23

    Errata 11.1 Errata Atmel ATmega48 The revision letter in this section refers to the revision of the ATmega48 device. 11.1.1 Rev. D • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may ...

  • Page 24

    Rev A • Part may hang in reset • Wrong values read after erase only operation • Watchdog timer interrupt disabled • Start-up time with crystal oscillator is higher than expected • High power consumption in power-down with external ...

  • Page 25

    Watchdog timer interrupt disabled If the watchdog timer interrupt flag is not cleared before a new timeout occurs, the watchdog will be disabled, and the interrupt flag will automatically be cleared. This is only applicable in interrupt only mode. ...

  • Page 26

    Errata Atmel ATmega88 The revision letter in this section refers to the revision of the ATmega88 device. 11.2.1 Rev. D • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost ...

  • Page 27

    ... Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 11.3 Errata Atmel ATmega168 The revision letter in this section refers to the revision of the ATmega168 device. 11.3.1 Rev C • Interrupts may be lost when writing the timer registers in the asynchronous timer 1 ...

  • Page 28

    A reset is applied in a 10ns window while the system clock prescaler value is updated by software. - Leaving SPI-programming mode generates an internal reset signal that can trigger this case. The two first cases can occur during ...

  • Page 29

    Two succeeding resets are applied where the second reset occurs in the 10ns window before the device is out of the reset-state caused by the first reset reset is applied in a 10ns window while the system ...

  • Page 30

    Datasheet Revision History Please note that the referring page numbers in this section are referred to this document. The referring revision in this section are referring to the document revision. 12.1 Rev. 2545T-04/ 12.2 Rev. ...

  • Page 31

    Rev. 2545O-02/ 12.7 Rev. 2545N-01/ 12.8 Rev. 2545M-09/ 12.9 Rev. 2545L-08/ 12.10 Rev. 2545K-04/ 2545TS–AVR–05/11 Changed minimum Power-on Reset Threshold ...

  • Page 32

    Rev. 2545J-12/ 12.12 Rev. 2545I-11/ 12.13 Rev. 2545H-10/ 10. 11. 12. 13. 14. 12.14 Rev. 2545G-06/ ...

  • Page 33

    ... Updated “Errata Atmel ATmega88” on page 25 page 27. ATmega48/88/168 120. 150. 160. 215. 243. 246. 260. Figure 29-45 on page 338. 22. 22. 32. updated. 22. 21. 32. 34. Table 28-6 on page 308, Table 28-2 on page 305 89. 290. 302. 15. and “Errata Atmel ATmega168” on 205. 241. 299. 33 ...

  • Page 34

    ... Atmel ATmega48” on page Table 28-4 on page 306, Table 26-9 on page 35. to 209. 215. 298. “Atmel ATmega168” on page 17. and “Errata Atmel ATmega168” on 215. 304. 15. 25. 1. with RAMEND as recommended Stack Pointer and a note regarding the use of 48. and Table 15-3 on page 130. ...

  • Page 35

    Renamed the following bits: - SPMEN to SELFPRGEN - PSR2 to PSRASY - PSR10 to PSRSYNC - Watchdog Reset to Watchdog System Reset 11. Updated C code examples containing old IAR syntax. 12. Updated BLBSET description in tus register” ...

  • Page 36

    ... Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621 ® and others are registered trademarks or trademarks of Atmel Corporation or its Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 JAPAN Tel: (+81)(3) 3523-3551 Fax: (+81)(3) 3523-7581 2545TS–AVR–05/11 ...