ATmega324P Atmel Corporation, ATmega324P Datasheet

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ATmega324P

Manufacturer Part Number
ATmega324P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega324P

Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Features
Note:
High-performance, Low-power Atmel
Advanced RISC Architecture
High Endurance Non-volatile Memory segments
JTAG (IEEE std. 1149.1 Compliant) Interface
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltages
Speed Grades
Power Consumption at 1 MHz, 1.8V, 25°C for ATmega164P/324P/644PV
– 131 Powerful Instructions – Most Single-clock Cycle Execution
– 32 × 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20 MHz
– On-chip 2-cycle Multiplier
– 16K/32K/64K Bytes of In-System Self-programmable Flash program memory
– 512B/1K/2K Bytes EEPROM
– 1K/2K/4K Bytes Internal SRAM
– Write/Erase Cycles: 10,000 Flash/ 100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
– Programming Lock for Software Security
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
– Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
– Real Time Counter with Separate Oscillator
– Six PWM Channels
– 8-channel, 10-bit ADC
– Byte-oriented Two-wire Serial Interface
– Two Programmable Serial USART
– Master/Slave SPI Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and
– 32 Programmable I/O Lines
– 40-pin PDIP, 44-lead TQFP, 44-pad VQFN/QFN/MLF (ATmega164P/324P/644P)
– 44-pad DRQFN (
– 1.8V - 5.5V for ATmega164P/324P/644PV
– 2.7V - 5.5V for ATmega164P/324P/644P
– ATmega164P/324P/644PV: 0 - 4 MHz @ 1.8V - 5.5V, 0 - 10 MHz @ 2.7V - 5.5V
– ATmega164P/324P/644P: 0 - 10 MHz @ 2.7V - 5.5V, 0 - 20 MHz @ 4.5V - 5.5V
– Active: 0.4 mA
– Power-down Mode: 0.1 µA
– Power-save Mode: 0.6 µA (Including 32 kHz RTC)
Extended Standby
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Differential mode with selectable gain at 1×, 10× or 200×
1. See
”Data Retention” on page
ATmega164P
)
®
AVR
8.
®
8-bit Microcontroller
(1)
8-bit
Microcontroller
with
16K/32K/64K
Bytes In-System
Programmable
Flash
ATmega164P/V
ATmega324P/V
ATmega644P/V
Summary
8011OS–AVR–07/10

Related parts for ATmega324P

ATmega324P Summary of contents

Page 1

... Power Consumption at 1 MHz, 1.8V, 25°C for ATmega164P/324P/644PV – Active: 0.4 mA – Power-down Mode: 0.1 µA – Power-save Mode: 0.6 µA (Including 32 kHz RTC) Note: 1. See ”Data Retention” on page ® ® AVR 8-bit Microcontroller ( 8-bit Microcontroller with 16K/32K/64K Bytes In-System Programmable Flash ATmega164P/V ATmega324P/V ATmega644P/V Summary 8011OS–AVR–07/10 ...

Page 2

Pin Configurations 1.1 Pinout - PDIP/TQFP/VQFN/QFN/MLF Figure 1-1. Note: ATmega164P/324P/644P 2 Pinout ATmega164P/324P/644P (PCINT8/XCK0/T0) PB0 (PCINT9/CLKO/T1) PB1 (PCINT10/INT2/AIN0) PB2 (PCINT11/OC0A/AIN1) PB3 (PCINT12/OC0B/SS) PB4 (PCINT13/MOSI) PB5 (PCINT14/MISO) PB6 (PCINT15/SCK) PB7 RESET VCC GND XTAL2 XTAL1 (PCINT24/RXD0) PD0 (PCINT25/TXD0) PD1 (PCINT26/RXD1/INT0) ...

Page 3

Pinout - DRQFN Figure 1- Table 1- 8011OS–AVR–07/10 DRQFN - Pinout ATmega164P Top view B1 B15 B2 B14 B3 B13 B4 B12 ...

Page 4

Overview The ATmega164P/324P/644P is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega164P/324P/644P achieves throughputs approaching 1 MIPS per MHz allowing the sys- tem designer ...

Page 5

... The ATmega164P/324P/644P AVR is supported with a full suite of program and system devel- opment tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation kits. 2.2 Comparison Between ATmega164P, ATmega324P and ATmega644P Table 2-1. Device ATmega164P ATmega324P ATmega644P 8011OS– ...

Page 6

Pin Descriptions 2.3.1 VCC Digital supply voltage. 2.3.2 GND Ground. 2.3.3 Port A (PA7:PA0) Port A serves as analog inputs to the Analog-to-digital Converter. Port A also serves as an 8-bit bi-directional I/O port with internal pull-up resistors (selected ...

Page 7

RESET Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running. The minimum pulse length is given in Characteristics” on page 2.3.8 XTAL1 ...

Page 8

About 3.1 Resources A comprehensive set of development tools, application notes and datasheetsare available for download on http://www.atmel.com/avr. 3.2 About Code Examples This documentation contains simple code examples that briefly show how to use various parts of the device. ...

Page 9

Register Summary Address Name Bit 7 (0xFF) Reserved - (0xFE) Reserved - (0xFD) Reserved - (0xFC) Reserved - (0xFB) Reserved - (0xFA) Reserved - (0xF9) Reserved - (0xF8) Reserved - (0xF7) Reserved - (0xF6) Reserved - (0xF5) Reserved - ...

Page 10

Address Name Bit 7 (0xC0) UCSR0A RXC0 (0xBF) Reserved - (0xBE) Reserved - (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved - (0xB6) ASSR - (0xB5) Reserved - (0xB4) OCR2B ...

Page 11

Address Name Bit 7 (0x7E) DIDR0 ADC7D (0x7D) Reserved - (0x7C) ADMUX REFS1 (0x7B) ADCSRB - (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved - (0x76) Reserved - (0x75) Reserved - (0x74) Reserved - (0x73) PCMSK3 PCINT31 (0x72) Reserved ...

Page 12

Address Name Bit 7 0x1C (0x3C) EIFR - 0x1B (0x3B) PCIFR - 0x1A (0x3A) Reserved - 0x19 (0x39) Reserved - 0x18 (0x38) Reserved - 0x17 (0x37) TIFR2 - 0x16 (0x36) TIFR1 - 0x15 (0x35) TIFR0 - 0x14 (0x34) Reserved - ...

Page 13

Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...

Page 14

Mnemonics Operands BRVC k Branch if Overflow Flag is Cleared BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O Register CBI P,b Clear Bit in I/O Register ...

Page 15

Mnemonics Operands SPM Store Program Memory IN Rd Port OUT P, Rr Out Port PUSH Rr Push Register on Stack POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK ...

Page 16

Ordering Information 6.1 ATmega164P (3) Speed (MHz) Power Supply 10 1.8V - 5.5V 20 2.7V - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information ...

Page 17

... Body, lead pitch 0.50 mm, Thermally Enhanced Plastic Very Thin Quad Flat No-Lead (VQFN) 8011OS–AVR–07/10 ATmega164P/324P/644P Ordering Code Package (2) ATmega324PV-10AU 44A (2) ATmega324PV-10PU 40P6 (2) ATmega324PV-10MU 44M1 (2) ATmega324P-20AU 44A (2) ATmega324P-20PU 40P6 (2) ATmega324P-20MU 44M1 329. Package Type (1) Operational Range Industrial ...

Page 18

ATmega644P (3) Speed (MHz) Power Supply 10 1.8V - 5.5V 20 2.7V - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. ...

Page 19

Packaging Information 7.1 44A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation ACB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions ...

Page 20

A SEATING PLANE Notes: 1. This package conforms to JEDEC reference MS-011, Variation AC. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm ...

Page 21

Pin A19 B16 eR A18 B15 D2 B11 A13 B10 A12 L BOTTOM VIEW 1. The terminal # Laser-marked Feature. Note: Package Drawing Contact: packagedrawings@atmel.com 8011OS–AVR–07/10 E TOP VIEW eT/2 A24 B20 ...

Page 22

... Errata 8.1 ATmega164P 8.1.1 Rev known Errata. 8.2 ATmega324P 8.2.1 Rev known Errata. 8.3 ATmega644P 8.3.1 Rev. A Not sampled. 8.3.2 Rev known Errata. ATmega164P/324P/644P 22 8011OS–AVR–07/10 ...

Page 23

Datasheet Revision History Please note that the referring page numbers in this section are referred to this document. The referring revision in this section are referring to the document revision. 9.1 Rev. 8011O- 07/ 9.2 Rev. 8011N- ...

Page 24

... Updated t and t unites in the table of RST BOD page 332. Updated typical values for ATmega324P and ATmega644P in the tables of acteristics” on page 326. Replaced the package drawing ”44M1” on page 426 Added 49-ball VFBGA pinout for ATmega164P/324P in Added 49-ball VFBGA (49C2) to ”Packaging Information” on page Updated ATmega644P ” ...

Page 25

... Updated Table 13-7 on page 85, Table 13-11 on page 88, Table 13-14 on page on page 328,Table 27-5 on page page 337 Updated ”ATmega324P DC Characteristics” on page 328 acteristics” on page 329. Updated Table 27-7 on page 332 Updated ”Watchdog Timer Configuration” on page Updated ”GTCCR – General Timer/Counter Control Register” on page Updated ” ...

Page 26

... Updated V limits in ”DC Characteristics” on page OL Updated note 3 and 4 in ”DC Characteristics” on page Added note to ”ATmega164P DC Characteristics” on page Added note to ”ATmega324P DC Characteristics” on page Updated Figure 28-13 on page 346 Updated ”DC Characteristics” on page Updated ”DC Characteristics” on page 2. 45. ...

Page 27

Rev. 8011A - 08/06 1. 8011OS–AVR–07/10 Initial revision. ATmega164P/324P/644P 27 ...

Page 28

... Atmel Corporation. All rights reserved. Atmel®, Atmel logo and combinations thereof AVR®, AVR® logo and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Microsoft®, Windows®, Microsoft Windows NT® and others are registered trademarks of Microsoft Corporation. Other terms and product names may be trademarks of others ...

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