ATmega325 Atmel Corporation, ATmega325 Datasheet

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ATmega325

Manufacturer Part Number
ATmega325
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega325

Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Features
High Performance, Low Power Atmel
Advanced RISC Architecture
High Endurance Non-volatile Memory Segments
Atmel
JTAG (IEEE std. 1149.1 compliant) Interface
Peripheral Features
Special Microcontroller Features
I/O and Packages
Speed Grade:
Temperature range:
Ultra-Low Power Consumption
– 130 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16MIPS Throughput at 16MHz
– On-Chip 2-cycle Multiplier
– In-System Self-programmable Flash Program Memory
– EEPROM
– Internal SRAM
– Write/Erase Cycles: 10,000 Flash/ 100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
– Programming Lock for Software Security
– Capacitive touch buttons, sliders and wheels
– QTouch and QMatrix
– Up to 64 sense channels
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
– Real Time Counter with Separate Oscillator
– Four PWM Channels
– 8-channel, 10-bit ADC
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Universal Serial Interface with Start Condition Detector
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and
– 53/68 Programmable I/O Lines
– 64-lead TQFP, 64-pad QFN/MLF, and 100-lead TQFP
– ATmega325V/ATmega3250V/ATmega645V/ATmega6450V:
– Atmel ATmega325/3250/645/6450:
– -40°C to 85°C IndustrSial
– Active Mode:
– Power-down Mode:
Mode
Standby
®
• 32KBytes (ATmega325/ATmega3250)
• 64KBytes (ATmega645/ATmega6450)
• 1Kbytes (ATmega325/ATmega3250)
• 2Kbytes (ATmega645/ATmega6450)
• 2Kbytes (ATmega325/ATmega3250)
• 4Kbytes (ATmega645/ATmega6450)
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
• 0 - 4MHz @ 1.8 - 5.5V; 0 - 8MHz @ 2.7 - 5.5V
• 0 - 8MHz @ 2.7 - 5.5V; 0 - 16MHz @ 4.5 - 5.5V
1MHz, 1.8V: 350µA
32kHz, 1.8V: 20µA (including Oscillator)
100 nA at 1.8V
QTouch
®
library support
®
acquisition
®
AVR
®
8-Bit Microcontroller
(1)
8-bit Atmel
Microcontroller
with In-System
Programmable
Flash
ATmega325/V
ATmega3250/V
ATmega645/V
ATmega6450/V
Summary
2570NS–AVR–05/11

Related parts for ATmega325

ATmega325 Summary of contents

Page 1

... Fully Static Operation – 16MIPS Throughput at 16MHz – On-Chip 2-cycle Multiplier • High Endurance Non-volatile Memory Segments – In-System Self-programmable Flash Program Memory • 32KBytes (ATmega325/ATmega3250) • 64KBytes (ATmega645/ATmega6450) – EEPROM • 1Kbytes (ATmega325/ATmega3250) • 2Kbytes (ATmega645/ATmega6450) – Internal SRAM • ...

Page 2

... Pin Configurations Figure 1-1. Pinout ATmega3250/6450 1 DNC 2 (RXD/PCINT0) PE0 3 (TXD/PCINT1) PE1 4 (XCK/AIN0/PCINT2) PE2 5 (AIN1/PCINT3) PE3 (USCK/SCL/PCINT4) PE4 6 7 (DI/SDA/PCINT5) PE5 8 (DO/PCINT6) PE6 9 (CLKO/PCINT7) PE7 10 VCC 11 GND 12 DNC 13 (PCINT24) PJ0 (PCINT25) PJ1 14 15 DNC 16 DNC 17 DNC 18 DNC 19 (SS/PCINT8) PB0 20 (SCK/PCINT9) PB1 21 (MOSI/PCINT10) PB2 ...

Page 3

... Figure 1-2. Pinout ATmega325/645 DNC 1 (RXD/PCINT0) PE0 2 (TXD/PCINT1) PE1 3 (XCK/AIN0/PCINT2) PE2 4 (AIN1/PCINT3) PE3 5 (USCK/SCL/PCINT4) PE4 6 (DI/SDA/PCINT5) PE5 7 (DO/PCINT6) PE6 8 (CLKO/PCINT7) PE7 9 (SS/PCINT8) PB0 10 (SCK/PCINT9) PB1 11 (MOSI/PCINT10) PB2 12 (MISO/PCINT11) PB3 13 (OC0A/PCINT12) PB4 14 (OC1A/PCINT13) PB5 15 (OC1B/PCINT14) PB6 16 Note: 2570NS–AVR–05/11 INDEX CORNER ATmega325/645 The large center pad underneath the QFN/MLF packages is made of metal and internally con- nected to GND ...

Page 4

... Overview The Atmel ATmega325/3250/645/6450 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the Atmel ATmega325/3250/645/6450 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. ...

Page 5

... Self-Programmable Flash on a monolithic chip, the Atmel Atmel ATmega325/3250/645/6450 is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The Atmel ATmega325/3250/645/6450 is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits. ...

Page 6

... Comparison between ATmega325, ATmega3250, ATmega645 and ATmega6450 The ATmega325, ATmega3250, ATmega645, and ATmega6450 differ only in memory sizes, pin count and pinout. devices. Table 2-1. Device ATmega325 ATmega3250 ATmega645 ATmega6450 2.3 Pin Descriptions The following section describes the I/O-pin special functions. 2.3 Digital supply voltage. ...

Page 7

... As inputs, Port H pins that are externally pulled low will source current if the pull-up resistors are activated. The Port H pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port H also serves the functions of various special features of the ATmega3250/6450 as listed on page 2570NS– ...

Page 8

... As inputs, Port J pins that are externally pulled low will source current if the pull-up resistors are activated. The Port J pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port J also serves the functions of various special features of the ATmega3250/6450 as listed on page 72. ...

Page 9

... Atmel QTouch Library User Guide 2570NS–AVR–05/11 1. ® ® QTouch Library provides a simple to use solution to realize touch sensitive inter- ® microcontrollers. The QTouch Library includes support for the ® acquisition methods. - also available for download from the Atmel website. ATmega325/3250/645/6450 9 ...

Page 10

... Reserved - (0xCC) Reserved - (0xCB) Reserved - (0xCA) Reserved - (0xC9) Reserved - (0xC8) Reserved - (0xC7) UDR0 (0xC6) UBRR0H (0xC5) UBRR0L (0xC4) 2570NS–AVR–05/11 Registers with bold type only available in ATmega3250/6450. Bit 6 Bit 5 Bit ...

Page 11

... Timer/Counter1 Output Compare Register B High Timer/Counter1 Output Compare Register B Low Timer/Counter1 Output Compare Register A High Timer/Counter1 Output Compare Register A Low Timer/Counter1 Input Capture Register High Timer/Counter1 Input Capture Register Low Timer/Counter1 High ATmega325/3250/645/6450 Bit 3 Bit 2 Bit USBS0 UCSZ01 UCSZ00 UCPOL0 ...

Page 12

... OCDR6 OCDR5 OCDR4 ACBG ACO ACI - - - SPI Data Register WCOL - - SPE DORD MSTR General Purpose I/O Register General Purpose I/O Register - - - - - - Timer/Counter0 Output Compare A Timer/Counter0 ATmega325/3250/645/6450 Bit 3 Bit 2 Bit WGM12 CS12 CS11 - - WGM11 - - AIN1D ADC3D ADC2D ADC1D - - - MUX3 MUX2 MUX1 - ADTS2 ...

Page 13

... Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel ATmega325/3250/645/6450 is a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used. 2570NS– ...

Page 14

... Branch if Half Carry Flag Set BRHC k Branch if Half Carry Flag Cleared BRTS k Branch if T Flag Set 2570NS–AVR–05/11 ATmega325/3250/645/6450 Description Rd ← ← Rdh:Rdl ← Rdh:Rdl + K Rd ← ← ← ← Rdh:Rdl ← Rdh:Rdl - K Rd ← ...

Page 15

... Load Program Memory LPM Rd, Z+ Load Program Memory and Post-Inc SPM Store Program Memory 2570NS–AVR–05/11 ATmega325/3250/645/6450 Description then PC ← then PC ← then PC ← then PC ← then PC ← I/O(P,b) ← ...

Page 16

... MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 2570NS–AVR–05/11 ATmega325/3250/645/6450 Description Rd ← ← Rr STACK ← ← STACK (see specific descr. for Sleep function) (see specific descr. for WDR/timer) For On-chip Debug Only Operation ...

Page 17

... Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 2570NS–AVR–05/11 ATmega325/3250/645/6450 (2) Ordering Code Package Type ATmega325V-8AU 64A (4) ATmega325V-8AUR 64A ATmega325V-8MU 64M1 (4) ATmega325V-8MUR 64M1 ATmega325-16AU 64A (4) ATmega325-16AUR 64A ATmega325-16MU 64M1 (4) ATmega325-16MUR 64M1 and Figure 28-2 on page 299. Package Type (1) Operational Range Industrial 0° ...

Page 18

... Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 2570NS–AVR–05/11 ATmega325/3250/645/6450 (2) Ordering Code Package Type ATmega3250V-8AU 100A (4) ATmega3250V-8AUR 100A ATmega3250-16AU 100A (4) ATmega3250-16AUR 100A and Figure 28-2 on page 299. Package Type (1) Operational Range Industrial 0°C to 85°C) ...

Page 19

... Figure 28-1 on page 299 4. Tape & Reel 64A 64-lead 1.0mm, Thin Profile Plastic Quad Flat Package (TQFP) 64M1 64-pad 1.0mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 2570NS–AVR–05/11 ATmega325/3250/645/6450 (2) Ordering Code Package Type ATmega645V-8AU 64A (4) ATmega645V-8AUR ...

Page 20

... Also Halide free and fully Green. 3. For Speed Grades see Figure 28-1 on page 299 4. Tape & Reel 100A 100-lead 1.0mm, 0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 2570NS–AVR–05/11 ATmega325/3250/645/6450 (2) Ordering Code Package Type ATmega6450V-8AU 100A (4) ...

Page 21

... San Jose, CA 95131 R 2570NS–AVR–05/11 B PIN 1 IDENTIFIER TITLE 64A, 64-lead Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega325/3250/645/6450 A COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A – – 1.20 A1 0.05 – ...

Page 22

... Pin #1 1 Option A Triangle 2 3 Option B Pin #1 Chamfer (C 0.30) Option C Pin #1 Notch e (0.20 R) TITLE 64M1, 64-pad 1.0 mm Body, Lead Pitch 0.50 mm, 5.40 mm Exposed Pad, Micro Lead Frame Package (MLF) ATmega325/3250/645/6450 C SEATING PLANE A1 A 0.08 C SIDE VIEW COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A 0.80 0.90 1.00 A1 – ...

Page 23

... San Jose, CA 95131 R 2570NS–AVR–05/11 B PIN 1 IDENTIFIER TITLE 100A, 100-lead Body Size, 1.0 mm Body Thickness, 0.5 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega325/3250/645/6450 A COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A – – 1.20 A1 0.05 – ...

Page 24

... Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 11.2 Errata ATmega3250 The revision letter in this section refers to the revision of the ATmega3250 device. 11.2.1 ATmega3250 Rev. C • Interrupts may be lost when writing the timer registers in the asynchronous timer 1 ...

Page 25

... ATmega3250 Rev. A • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when writing the timer registers in the asynchronous timer The interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous Timer/Counter register (TCNTx) is 0x00. ...

Page 26

... Grades” on page Updated “System and Reset Characteristics” on page Updated the Register Description at the end of each chapter. Updated “Errata” on page 24. Updated Table 28-7 on page 304. Updated note in Table 28-7 on page ATmega325/3250/645/6450 ® trademarks. to include the “Tape & Reel” 281. 299. 301. 304. 26 ...

Page 27

... ACBG: Analog Comparator Bandgap Select” on page Updated Features in “Analog to Digital Converter” on page Updated “Prescaling and Conversion Timing” on page Updated “Atmel ATmega325/3250/645/6450 Boot Loader Parameters” on page 262. Updated “DC Characteristics” on page ATmega325/3250/645/6450 Table 15-4 on page 97, ...

Page 28

... Serial Peripheral Interface” on page “Part Number” on page 225 updated. “Typical Characteristics” on page 306 “DC Characteristics” on page 297 “Alternate Functions of Port G” on page 76 Updated “Ordering Information” on page Initial revision. ATmega325/3250/645/6450 55. 268. and Figure 27-5 on page 276. 271. 311. 17. ...

Page 29

... Atmel , Atmel logo and combinations thereof, AVR marks of Atmel Corporation or its subsidiaries. Windows other countries. Other terms and product names may be trademarks of others. Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL ...

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