ATmega48 Automotive Atmel Corporation, ATmega48 Automotive Datasheet - Page 205
ATmega48 Automotive
Manufacturer Part Number
ATmega48 Automotive
Description
Manufacturer
Atmel Corporation
Specifications of ATmega48 Automotive
Flash (kbytes)
4 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
256
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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19.3.5
Figure 19-6. Typical Data Transmission
7530I–AVR–02/10
SDA
SCL
START
Combining Address and Data Packets into a Transmission
Addr MSB
1
2
Figure 19-5. Data Packet Format
A transmission basically consists of a START condition, a SLA+R/W, one or more data packets
and a STOP condition. An empty message, consisting of a START followed by a STOP condi-
tion, is illegal. Note that the Wired-ANDing of the SCL line can be used to implement
handshaking between the Master and the Slave. The Slave can extend the SCL low period by
pulling the SCL line low. This is useful if the clock speed set up by the Master is too fast for the
Slave, or the Slave needs extra time for processing between the data transmissions. The Slave
extending the SCL low period will not affect the SCL high period, which is determined by the
Master. As a consequence, the Slave can reduce the TWI data transfer speed by prolonging the
SCL duty cycle.
Figure 19-6
between the SLA+R/W and the STOP condition, depending on the software protocol imple-
mented by the application software.
Transmitter
SLA+R/W
Aggregate
SDA from
SDA from
SCL from
Receiver
Master
SDA
Addr LSB
SLA+R/W
7
shows a typical data transmission. Note that several data bytes can be transmitted
R/W
8
Data MSB
ACK
9
1
2
ATmega48/88/168 Automotive
Data MSB
1
Data Byte
7
2
Data Byte
Data LSB
8
7
ACK
9
Data LSB
8
ACK
STOP, REPEATED
9
START or Next
Data Byte
STOP
205
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