ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 256

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

19.10.2
8291A–AVR–10/11
CTRLB
–
Control register B
• Bit 0
This bit enables smart mode. When Smart mode is enabled, the acknowledge action, as set by
the ACKACT bit in the CTRLB register, is sent immediately after reading the DATA register.
• Bit 7:3
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 2
This bit defines the slave's acknowledge behavior after an address or data byte is received from
the master. The acknowledge action is executed when a command is written to the CMD bits. If
the SMEN bit in the CTRLA register is set, the acknowledge action is performed when the DATA
register is read.
Table 19-7
Table 19-7.
• Bit 1:0
Writing these bits trigger the slave operation as defined by
bits and always read as zero. The operation is dependent on the slave interrupt flags, DIF and
APIF. The acknowledge action is only executed when the slave receives data bytes or address
byte from the master.
Table 19-8.
Bit
+0x01
Read/Write
Initial Value
CMD[1:0]
00
01
10
–
–
–
–
SMEN: Smart Mode Enable
ACKACT: Acknowledge Action
lists the acknowledge actions.
Reserved
CMD[1:0]: Command
ACKACT
R
7
–
0
TWI slave acknowledge actions.
TWI slave command.
0
1
Configuration
COMPLETE
NOACT
Group
R
6
–
0
R
5
–
0
Used to complete transaction
Action
Send ACK
Send NACK
DIR
X
X
0
1
R
4
–
0
Operation
No action
Reserved
Execute acknowledge action succeeded by waiting
for any START (S/Sr) condition
Wait for any START (S/Sr) condition
3
–
R
0
Atmel AVR XMEGA B
Table
ACKACT
R/W
2
0
19-8. The CMD bits are strobe
R/W
1
0
CMD[1:0]
R/W
0
0
CTRLB
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