SAM7S16 Atmel Corporation, SAM7S16 Datasheet - Page 247

• Manufacturer Part Number: SAM7S16
• Manufacturer: Atmel Corporation

Specifications of SAM7S16

• Flash (kbytes): 16 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 55 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 21
• Ext Interrupts: 21
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

B.9
B.9.1
B.9.2
ARM DDI 0029G
Behavior of the program counter during debug
Breakpoints
Watchpoints
The debugger must keep track of what happens to the PC, so that the ARM7TDMI core
can be forced to branch back to the place at which program flow was interrupted by
debug. Program flow can be interrupted by any of the following:
•
•
•
•
•
Entry into debug state from a breakpoint advances the PC by four addresses or 16 bytes.
Each instruction executed in debug state advances the PC by one address or four bytes.
The usual way to exit from debug state after a breakpoint is to remove the breakpoint
and branch back to the previously-breakpointed address.
For example, if the ARM7TDMI core entered debug state from a breakpoint set on a
given address and two debug speed instructions were executed, a branch of minus seven
addresses must occur:
•
•
•
The following sequence shows the data scanned into scan chain 1, most significant bit
first. The value of the first digit goes to the BREAKPT bit and then the instruction data
into the remainder of scan chain 1:
After the ARM7TDMI core enters debug state, it must execute a minimum of two
instructions before the branch, although these can both be NOPs (
branches, you can replace the final branch with a subtract, with the PC as the
destination,
The return to program execution after entry to debug state from a watchpoint is done in
the same way as the procedure described in Breakpoints on page B-29.
Breakpoints on page B-29
Watchpoints on page B-29
Watchpoint with another exception on page B-30
Debug request on page B-30
System speed access on page B-31.
four for debug entry
two for the instructions
one for the final branch.
Copyright © 1994-2001. All rights reserved.
in the above example.
Debug in Depth
). For small
B-29