SAM7SE32 Atmel Corporation, SAM7SE32 Datasheet - Page 224

• Manufacturer Part Number: SAM7SE32
• Manufacturer: Atmel Corporation

Specifications of SAM7SE32

• Flash (kbytes): 32 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 48 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 88
• Ext Interrupts: 88
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Debug in Depth
B.2
B-6
Resetting the TAP controller
The boundary-scan (JTAG) interface includes a state machine controller named the TAP
controller. To force the TAP controller into the correct state after power-up, you must
apply a reset pulse to the nTRST signal:
•
•
A clock on TCK is not necessary to reset the device.
The nTRST signal:
1.
2.
3.
4.
You must use nTRST to reset the boundary-scan interface at least once after power up.
After this the TAP controller state machine can be put into the TEST-LOGIC RESET
state to subsequently reset the boundary-scan interface.
When the boundary-scan interface or EmbeddedICE is to be used, nTRST must
be driven LOW and then HIGH again.
When the boundary-scan interface or EmbeddedICE is not to be used, the nTRST
input can be tied permanently LOW.
Selects system mode. This means that the boundary-scan cells do not intercept
any of the signals passing between the external system and the core.
Selects the IDCODE instruction.
When the TAP controller is put into the SHIFT-DR state and TCK is pulsed, the
contents of the ID register are clocked out of TDO.
Sets the TAP controller state machine to the TEST-LOGIC RESET state.
Sets the scan chain select register to
chain, if present.
Note
Note
Copyright © 1994-2001. All rights reserved.
, which selects the external boundary-scan
ARM DDI 0029G