SAM9G35 Atmel Corporation, SAM9G35 Datasheet - Page 13

• Manufacturer Part Number: SAM9G35
• Manufacturer: Atmel Corporation

Specifications of SAM9G35

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 6
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

ARM DDI0198D
Figure 12-2
Figure B-1
Figure B-2
Figure B-3
Figure B-4
Figure B-5
Figure B-6
Figure B-7
Figure B-8
Figure B-9
Figure B-10
Logic for stopping ARM926EJ-S clock during wait for interrupt .............................. 12-3
CP15 MRC and MCR bit pattern ............................................................................... B-2
Rd format for selecting main TLB entry ..................................................................... B-6
Rd format for accessing MVA tag of main or lockdown TLB entry ............................ B-7
Rd format for accessing PA and AP data of main or lockdown TLB entry ................ B-8
Write to the data RAM ............................................................................................. B-10
Rd format for selecting lockdown TLB entry ........................................................... B-11
Cache Debug Control Register format .................................................................... B-12
MMU Debug Control Register format ...................................................................... B-14
Memory Region Remap Register format ................................................................. B-15
Memory region attribute resolution .......................................................................... B-17
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List of Figures
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