SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 324

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SAM3N0C

Manufacturer Part Number
SAM3N0C
Description
Manufacturer
Atmel Corporation
Datasheets
22.5
Table 22-2.
Note:
324
Offset
0x100
0x104
0x108
0x10C
0x110
0x114
0x118
0x11C
0x120
0x124
Peripheral DMA Controller (PDC) User Interface
1. PERIPH: Ten registers are mapped in the peripheral memory space at the same offset. These can be defined by the user
SAM3N
according to the function and the desired peripheral.)
Register Mapping
Register
Receive Pointer Register
Receive Counter Register
Transmit Pointer Register
Transmit Counter Register
Receive Next Pointer Register
Receive Next Counter Register
Transmit Next Pointer Register
Transmit Next Counter Register
Transfer Control Register
Transfer Status Register
PERIPH
PERIPH_RNPR
PERIPH_RNCR
PERIPH_TNPR
PERIPH_TNCR
PERIPH_PTCR
PERIPH_PTSR
PERIPH_RCR
PERIPH_TCR
PERIPH_TPR
Name
(1)
_RPR
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Write-only
Read-only
Access
11011A–ATARM–04-Oct-10
Reset
0
0
0
0
0
0
0
0
0
0

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