LT1711IMS8 Linear Technology, LT1711IMS8 Datasheet - Page 4

• Manufacturer Part Number: LT1711IMS8
• Description: IC COMP R-RINOUT SINGLE 8-MSOP
• Manufacturer: Linear Technology
• Series: UltraFast™r
• Type: General Purposer

Specifications of LT1711IMS8

• Number Of Elements: 1
• Output Type: CMOS, Complementary, Rail-to-Rail, TTL
• Voltage - Supply: 2.4 V ~ 12 V, ±2.4 V ~ 6 V
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

LT1711/LT1712
The
V
SYMBOL PARAMETER
A
V
V
I
I
V
V
I
t
t
t
t
t
t
t
f
t
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LT1711C/LT1712C are guaranteed to meet specified
performance from 0 C to 70 C. They are designed, characterized and
expected to meet specified performance from – 40 C to 85 C but are not
tested or QA sampled at these temperatures. The LT1711I/LT1712I are
guaranteed to meet specified performance from –40 C to 85 C.
Note 3: The negative supply should not be greater than the ground pin
voltage and the maximum voltage across the positive and negative
supplies should not be greater than 12V.
Note 4: Input offset voltage (V
a configuration that adds external hysteresis. It is defined as the average of
the two hysteresis trip points.
Note 5: Input bias current (I
currents.
Note 6: Propagation delay (t
the actual V
requirements, the LT1711/LT1712 propagation delay is specified with a
1k load to ground for 5V supplies, or to mid-supply for 2.7V or 5V
single supplies.
Note 7: Latch propagation delay (t
respond when the latch pin is deasserted. Latch setup time (t
ELECTRICAL CHARACTERISTICS
4
IL
PD
r
f
LPD
SU
H
DPW
MAX
JITTER
+
–
V
OH
OL
IH
IL
t
t
+
PD
PD
= 5V, V
= t
denotes specifications which apply over the full operating temperature range, otherwise specifications are at T
PD
+
Small-Signal Voltage Gain
Output Voltage Swing HIGH (Note 8)
Output Voltage Swing LOW (Note 8)
Positive Supply Current (Per Comparator)
Negative Supply Current (Per Comparator)
Latch Pin High Input Voltage
Latch Pin Low Input Voltage
Latch Pin Current
Propagation Delay (Notes 6, 11)
Differential Propagation Delay (Notes 6, 11)
Output Rise Time
Output Fall Time
Latch Propagation Delay (Note 7)
Latch Setup Time (Note 7)
Latch Hold Time (Note 7)
Minimum Latch Disable Pulse Width (Note 7)
Maximum Toggle Frequency
Output Timing Jitter
OS
– t
–
= – 5V, V
. Differential propagation delay is defined as:
PD
–
. Load capacitance is 10pF. Due to test system
CM
= 0V, V
B
PD
) is defined as the average of the two input
OS
) is measured with the overdrive added to
) is measured with the LT1711/LT1712 in
LPD
LATCH
) is the delay time for the output to
= 0.8V, C
LOAD
= 10pF, V
SU
CONDITIONS
I
I
I
I
V
V
V
10% to 90%
90% to 10%
V
V
OUT
OUT
OUT
OUT
OVERDRIVE
OVERDRIVE
LATCH
IN
IN
V
V
V
V
) is the
IN
IN
IN
IN
= 100mV
= 630mV
= 1mA, V
= 10mA, V
= – 1mA, V
= – 10mA, V
= 100mV, V
= 100mV, V
= 100mV, V
= 100mV, V
= V
OVERDRIVE
+
= 1V
= 1V
P-P
P-P
OVERDRIVE
OVERDRIVE
OVERDRIVE
Sine Wave
(0dBm) Sine Wave, f = 30MHz
OVERDRIVE
OVERDRIVE
OVERDRIVE
OVERDRIVE
OVERDRIVE
interval in which the input signal must remain stable prior to asserting the
latch signal. Latch hold time (t
which the input signal must remain stable. Latch disable pulse width
(t
latches in new data on the data inputs.
Note 8: Output voltage swings are characterized and tested at V
V
specifications at V
Note 9: The input voltage range is tested under the more demanding
conditions of V
by design and correlation to meet these specifications at V
Note 10: The LT1711/LT1712 voltage gain is tested at V
V
guaranteed by design and correlation.
Note 11: The LT1711/LT1712 t
V
and correlation.
Note 12: Care must be taken to make sure that the LT1711/LT1712 do not
exceed T
temperature range. T
current increases with switching frequency (see Typical Performance
Characteristics).
DPW
–
–
–
= 20mV, unless otherwise specified.
= 0V. They are guaranteed by design and correlation to meet these
= –5V only. Voltage gain at single supply V
= 0V. Propagation delay at V
= 50mV
) is the width of the negative pulse on the latch enable pin that
= 50mV
= 50mV
= 50mV
= 20mV
= 20mV
= 5mV
= 20mV
JMAX
when operating with 5V supplies over the industrial
+
= 5V and V
–
= – 5V.
JMAX
is not exceeded for DC inputs, but supply
–
= –5V. The LT1711/LT1712 are guaranteed
H
PD
) is the interval after the latch is asserted in
+
= 5V, V
is tested at V
MIN
4.5
4.3
2.4
1
–
= –5V is guaranteed by design
+
+
0.20
0.30
TYP
= 5V and V
100
4.8
4.6
4.5
5.5
0.5
= 5V and 2.7V with
15
17
11
9
2
2
5
1
0
5
A
+
= 25 C.
= 5V and
MAX
–
+
0.4
0.5
0.8
6.0
8.5
1.5
22
30
12
15
15
= 0V.
= 2.7V is
+
= 5V and
UNITS
ps
V/mV
MHz
RMS
mA
mA
mA
mA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
V
V
V
V
A