STM8L151K2 STMicroelectronics, STM8L151K2 Datasheet - Page 23

• Manufacturer Part Number: STM8L151K2
• Description: STM8L-Ultra Low Power-8 bits Microcontrollers
• Manufacturer: STMicroelectronics

Specifications of STM8L151K2

• Operating Power Supply: 1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR)
• Temperature Range: -40 to 85 or 125 °C
• 5 Low Power Modes: Wait, Low power run, Low power wait, Active-halt with RTC, Halt
• Ultralow Leakage Per I/0: 50 nA
• Fast Wakeup From Halt: 5 μs
• Max Freq: 16 MHz, 16 CISC MIPS peak

STM8L151x2, STM8L151x3
3.15
3.15.1
Note:
3.15.2
Note:
3.15.3
Note:
3.16
Communication interfaces
SPI
The serial peripheral interface (SPI1) provides half/ full duplex synchronous serial
communication with external devices.
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SPI1 can be served by the DMA1 Controller.
I²C
The I
specific sequencing, protocol, arbitration and timing.
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I
USART
The USART interface (USART1) allows full duplex, asynchronous communications with
external devices requiring an industry standard NRZ asynchronous serial data format. It
offers a very wide range of baud rates.
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USART1 can be served by the DMA1 Controller.
Infrared (IR) interface
The Low density STM8L15x devices contain an infrared interface which can be used with an
IR LED for remote control functions. Two timer output compare channels are used to
generate the infrared remote control signals.
2
C1 can be served by the DMA1 Controller.
Maximum speed: 8 Mbit/s (f
Full duplex synchronous transfers
Simplex synchronous transfers on 2 lines with a possible bidirectional data line
Master or slave operation - selectable by hardware or software
Hardware CRC calculation
Slave/master selection input pin
Master, slave and multi-master capability
Standard mode up to 100 kHz and fast speed modes up to 400 kHz.
7-bit and 10-bit addressing modes.
SMBus 2.0 and PMBus support
Hardware CRC calculation
1 Mbit/s full duplex SCI
SPI1 emulation
High precision baud rate generator
Smartcard emulation
IrDA SIR encoder decoder
Single wire half duplex mode
2
C bus interface (I
2
C1) provides multi-master capability, and controls all I²C bus-
Doc ID 018780 Rev 3
SYSCLK
/2) both for master and slave
Functional overview
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