STM8L151C6 STMicroelectronics, STM8L151C6 Datasheet - Page 16

• Manufacturer Part Number: STM8L151C6
• Description: STM8L-Ultra Low Power-8 bits Microcontrollers
• Manufacturer: STMicroelectronics

Specifications of STM8L151C6

• Temp. Range: - 40 °C to 85, 105 or 125 °C
• 5 Low Power Modes: Wait, Low power run (5.1 μA), Low power wait (3 μA), Active-halt with full RTC (1.3 μA), Halt (350 nA)
• Consumption: 195 μA/MHz+440μA
• Ultralow Leakage Per I/0: 50 nA
• Fast Wakeup From Halt: 4.7 μs
• Lcd: up to 4x28 segments w/ step-up converter
• 4 Channels; Supported Peripherals: ADC, DAC, SPI, I2C, USART, timers
• 2 Watchdogs: 1 Window, 1 Independent

Functional overview
3.3
3.3.1
3.3.2
3.3.3
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Reset and supply management
Power supply scheme
The device requires a 1.65 V to 3.6 V operating supply voltage (V
supply pins must be connected as follows:
Power supply supervisor
The device has an integrated ZEROPOWER power-on reset (POR)/power-down reset
(PDR), coupled with a brownout reset (BOR) circuitry. At power-on, BOR is always active,
and ensures proper operation starting from 1.8 V. After the 1.8 V BOR threshold is reached,
the option byte loading process starts, either to confirm or modify default thresholds, or to
disable BOR permanently (in which case, the V
Five BOR thresholds are available through option bytes, starting from 1.8 V to 3 V. To
reduce the power consumption in Halt mode, it is possible to automatically switch off the
internal reference voltage (and consequently the BOR) in Halt mode. The device remains
under reset when V
for any external reset circuit.
The device features an embedded programmable voltage detector (PVD) that monitors the
V
levels between 1.85 V and 3.05 V, chosen by software, with a step around 200 mV. An
interrupt can be generated when V
V
a warning message and/or put the MCU into a safe state. The PVD is enabled by software.
Voltage regulator
The medium density STM8L15x embeds an internal voltage regulator for generating the 1.8
V power supply for the core and peripherals.
This regulator has two different modes:
When entering Halt or Active-halt modes, the system automatically switches from the MVR
to the LPVR in order to reduce current consumption.
DD
DD
/V
/V
V
I/Os and for the internal regulator. Provided externally through V
corresponding ground pin is V
V
analog peripherals (minimum voltage to be applied to V
used). V
V
I/Os. V
V
externally through V
V
through V
Main voltage regulator mode (MVR) for Run, Wait for interrupt (WFI) and Wait for event
(WFE) modes.
Low power voltage regulator mode (LPVR) for Halt, Active-halt, Low power run and Low
power wait modes.
SS1
SSA ;
SS2
REF+
REF+
DDA
DDA
; V
; V
power supply and compares it to the V
is higher than the V
V
; V
DD2
(for DAC): external voltage reference for DAC must be provided externally
DDA
DD2
DD1
DDA
REF-
REF+
and V
= 1.8 to 3.6 V, down to 1.65 V at power down: external power supplies for
= 1.8 to 3.6 V, down to 1.65 V at power down: external power supply for
= 1.8 to 3.6 V, down to 1.65 V at power down: external power supplies for
and V
(for ADC1): external reference voltage for ADC1. Must be provided
.
DD
SS2
is below a specified threshold, V
SSA
REF+
must be connected to V
must be connected to V
PVD
and V
Doc ID 15962 Rev 9
threshold. The interrupt service routine can then generate
DD
SS1
REF-
/V
.
DDA
pin.
drops below the V
DD
PVD
DD1
min value at power down is 1.65 V).
DD1
threshold. This PVD offers 7 different
and V
POR/PDR
and V
SS1
DDA
SS1
PVD
STM8L151xx, STM8L152xx
, respectively.
or V
is 1.8 V when the ADC1 is
, respectively.
DD
threshold and/or when
). The external power
BOR
DD1
, without the need
pins, the