DS1677 Maxim, DS1677 Datasheet
DS1677
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DS1677 Summary of contents
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... GENERAL DESCRIPTION The DS1677 portable system controller is a circuit that incorporates many of the functions necessary for low-power portable products integrated into one chip. The device provides a real-time clock (RTC), NV RAM controller, microprocessor monitor, power-fail warning, and a 3-channel, 8-bit analog-to-digital converter (ADC) ...
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... The ADC is monotonic (no missing codes) and has an internal analog filter to reduce high-frequency noise. OPERATION The block diagram in Figure 1 shows the main elements of the DS1677. The following paragraphs describe the function of each pin. DS1677 BLOCK DIAGRAM Figure 1 ...
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... X2, X1 frequency signals be kept away from the crystal area. For more information on crystal selection and crystal layout considerations, refer to Application Note 58: Crystal Considerations with Dallas Real Time Clocks. The DS1677 does not function without a crystal +5.0V Input DC Power CC Active-Low Strobe Input ...
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... ADDRESS/COMMAND BYTE The command byte for the DS1677 is shown in Figure 2. Each data transfer is initiated by a command byte. Bits 0 through 6 specify the address of the registers to be accessed. The MSB (bit 7) is the Read/Write bit ...
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... The contents of the time, calendar, and alarm registers are in the binary-coded decimal (BCD) format. The DS1677 can run in either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the 12- or 24-hour mode select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is the AM/PM bit with logic one being PM. In the 24-hour mode, bit 5 is the second 10-hour bit (20– ...
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... EOSC (Enable Oscillator). This bit, when set to logic 0 will start the oscillator. When this bit is set to a logic 1, the oscillator is stopped and the DS1677 is placed into a low-power standby mode with a current drain of less than 200nA when in battery-backup mode. When the DS1677 is powered by V ...
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... The DS1677 provides automatic backup and write protection for an external SRAM. This function is provided by gating the chip enable signal and by providing a constant power supply through the V The DS1677 nonvolatizes the external SRAM by write protecting the SRAM and by providing a back–up power supply in the absence of V ...
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... After the internal 250ms timer has expired, the DS1677 will continue RST to monitor the line. If the line is still low, the DS1677 will continue to monitor the line looking for a RST rising edge. Upon detecting release, the DS1677 will force the The third microprocessor monitoring function provided by the DS1677 is a watchdog timer ...
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... ADC Register to insure that the contents are stable during a read cycle. Once a read cycle to the ADC Register has been started, the DS1677 will not update that register until the read cycle has been completed. It should also be mentioned that taking CS low will abort the read cycle and will allow the ADC Register to be updated ...
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... Data transfers can occur one byte at a time or in multiple byte burst mode. After CS is driven high an address is written to the DS1677. After the address, one or more data bytes can be read or written. For a single byte transfer one byte is read or written and then CS is driven low. For a multiple byte transfer, multiple bytes can be read or written to the DS1677 after the address has been written ...
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SINGLE BYTE DATA TRANSFER Figure 6 MULTIPLE BYTE BURST TRANSFER Figure ...
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POWER-FAIL COMPARATOR Figure ...
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... Soldering Temperature………………………………………….See IPC/JEDEC J-STD-020 Specification This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect device reliability. ...
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CAPACITANCE PARAMETER Input Capacitance I/O Capacitance Crystal Capacitance AC ELECTRICAL CHARACTERISTICS PARAMETER Data to Clock Setup CLK to Data Hold CLK to Data Delay CLK to Low Time CLK to High Time CLK Frequency CLK Rise and Fall CS to ...
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TIMING DIAGRAM: READ DATA Figure 9 TIMING DIAGRAM: WRITE DATA Figure 10 PUSHBUTTON RESET Figure ...
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POWER-UP Figure 12 POWER-DOWN Figure ...
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... Control Register is set to a logic 1, t EOSC of the crystal oscillator. open and I/O, SCLK at logic 0. ADC is enabled. CCO open and I/O, SCLK at logic 0. ADC is disabled. CCO = 0.8V and 10ns maximum rise and fall time 0.4V occurs when V drops below the lower of V ...
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... The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation. DOCUMENT NO. 21-0066 © 2005 Maxim Integrated Products DS1677 ...