73S8023C Maxim, 73S8023C Datasheet
73S8023C
Related parts for 73S8023C
73S8023C Summary of contents
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... Emergency card deactivation is initiated upon card extraction or upon any fault generated by the protection circuitry. The 73S8023C requires only a single 2 3.6 V power supply, and features a high-efficiency embedded DC-DC converter. This architecture, plus a Power Down digital input that allow placing the very low-power mode ...
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... AUX1UC 28 AUX2UC 2 VDDF_ADJ 17 I FAULT CC V FAULT DD V FAULT CC R-C OSC. DIGITAL Int_Clk & ISO-7816-3 SEQUENCER CLOCK TEMP FAULT ICC I/O BUFFERS Figure 1: 73S8023C Block Diagram DS_8023C_019 LIN VDD GND 12 DC-DC GND CONVERTER 15 VCC ICC RESET 14 BUFFER RST ICC CLOCK 13 BUFFER CLK 25 ...
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... Package Thermal Parameters .................................................................................................... 18 12.4 Card Interface Characteristics .................................................................................................... 19 12.5 Digital Signals ............................................................................................................................. 22 12.6 DC Characteristics ...................................................................................................................... 23 12.7 Voltage / Temperature Fault Detection Circuits .......................................................................... 23 13 Mechanical Drawing (32-QFN) ......................................................................................................... 24 14 Package Pin Designation (32-QFN) ................................................................................................. 25 15 Ordering Information ........................................................................................................................ 26 16 Related Documentation .................................................................................................................... 26 17 Contact Information .......................................................................................................................... 26 Revision History ........................................................................................................................................ 27 Rev. 1.5 Table of Contents 73S8023C Data Sheet 3 ...
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... Figure 7: Asynchronous Deactivation Sequence ........................................................................................ 14 Figure 8: Timing Diagram – Management of the Interrupt Line OFF .......................................................... 15 Figure 9: I/O and I/OUC State Diagram ...................................................................................................... 16 Figure 10: I/O – I/OUC Delays Timing Diagram .......................................................................................... 16 Figure 11: 73S8023C – Typical Application Schematic .............................................................................. 17 Figure 12: DC – DC Converter efficiency (V Figure 13: DC – DC Converter Efficiency (V Figure 14: 32-QFN Mechanical Drawing ..................................................................................................... 24 Figure 15: 32-QFN 73S8023C Pin Out ...
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... System controller interface supply voltage: Supply voltage for internal power supply and DC-DC converter power supply source. GND 1 DC-DC converter ground. GND 21 Digital ground. LIN 2 External inductor. Connect external inductor from pin inductor close to pin 2. Rev. 1.5 73S8023C Data Sheet CC. CC. CC. DDF . Keep the DD 5 ...
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... PWRDN 5 Power Down control input: Active High. When Power Down (PD) mode is activated, all internal analog functions are disabled to place the 73S8023C in its lowest power consumption mode. The PD mode is allowed only out of a card session (PWRDN high is ignored when CMDVCC = 0). Must be tied to ground when power down function is not used ...
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... Power Down: The PWRDN pin is a digital input that allows the host controller to put the 73S8023C in its Power Down state. This pin can only be activated outside of a card session. • ...
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... Data Sheet 3 Oscillator The 73S8023C device has an on-chip oscillator that can generate the smart card clock using an external crystal (connected between the pins XTALIN and XTALOUT) to set the oscillator frequency. When the card clock signal is available from another source, it can be connected to the pin XTALIN, and the pin XTALOUT should be left unconnected. Signal CLKOUT is the buffered version of the signal on XTALIN. 4 DC-DC Converter – ...
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... DD to ground to raise the V fault voltage to another value, V EXT DD fault voltage is to use a resistive network of DD Figure 11: 73S8023C – Typical Application is the desired new threshold voltage. TH fault threshold voltage of 2 desired, solving for Kx gives: DD 73S8023C Data Sheet and card deactivation ...
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... DC-DC converter, to put the 73S8023C in its lowest power consumption mode. PD mode is only allowed in the deactivated condition (out of a card session, when the CMDVCC signal is driven high from the host controller) ...
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... DS_8023C_019 8 Activation and Deactivation 8.1 Activation Sequence (Synchronous Mode) The 73S8023C smart card interface IC has an internal ~10 ms delay at power-on reset or on application . No activation is allowed at this time. CMDVCC (edge triggered) must then be set low > DDF activate the card. The following steps list the activation sequence and the timing of the card control signals when the system controller sets CMDVCC low: 1 ...
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... CLK truncation may occur if an OFF event is triggered) Figure 4: Synchronous Deactivation Operation – CKSEL = High 8.3 Activation Sequence (Asynchronous Mode) The 73S8023C smart card interface IC has an internal 10 ms delay at power-on reset or upon application or upon exit of Power Down mode. The card interface may only be activated when OFF > ...
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... Figure 6: Asynchronous Activation Sequence – Timing Diagram #2 Rev. 1 the card is turned off turn I/O (AUX1, AUX2) to reception mode. after I reception mode RSTIN may be set high before 73S8023C Data Sheet normal operation, the however the sequencer ...
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... Data Sheet 8.4 Deactivation Sequence (Asynchronous Mode) Deactivation is initiated either by the system controller by setting CMDVCC high, or automatically in the event of hardware faults. Hardware faults are over-current, overheating, V extraction during the session. The following steps list the deactivation sequence and the timing of the card control signals when the system controller sets the CMDVCC high or OFF goes low due to a fault or card removal: 1 ...
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... In order to be compliant to the NDS specifications capacitor must be added between pins I/O (C7) and GND (C5) at the smart card connector. Rev. 1.5 OFF is low by card extracted within card session Section 8 Activation and Figure 10. 73S8023C Data Sheet OFF is low by any fault within card session 15 ...
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... Data Sheet Figure 9: I/O and I/OUC State Diagram IO IOUC Delay from I/O to I/OUC: t Delay from I/OUC to I/O: t Figure 10: I/O – I/OUC Delays Timing Diagram 16 Neutral State No I/O reception Yes I/O & not I/OUC No I/OUC No & not I/O Yes I/OUC in No I/OUC yes t IO_HL t IO_LH = 100ns t = 25ns ...
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... VDD 20K Card detection CLK track should be routed switch is far from RST, I/O, C4 and normally C8. closed. Smart Card Connector Figure 11: 73S8023C – Typical Application Schematic DS_8023C_019 AUX2UC_to/from_uC AUX1UC_to.from_uC See NOTE 6 I/OUC_to/from_uC STROBE_from_uC See note 7 External_clock_from uC VDD - Rext2 Y1 VDD ...
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... Data Sheet 12 Electrical Specification 12.1 Absolute Maximum Ratings Operation outside these rating limits may cause permanent damage to the device. Parameter Supply Voltage V DD Input Voltage for Digital Inputs Storage Temperature Pin Voltage (except LIN and card interface) Pin Voltage (LIN) Pin Voltage (card interface) ESD Tolerance – ...
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... V as 100 CC selected, L=10 µH 100 73S8023C Data Sheet Typ Max Unit 0.1 V 0.4 V 5.25 V 3.2 V 5.25 V 3.2 V 5.25 V 3.2 V 350 mV mA 125 180 mA 0.15 0.25 V/µs 0.3 0.5 V/µs µF 3.3 4.7 µ ...
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... Data Sheet 100 2.7V 3.0V 65 3. Figure 12: DC – DC Converter efficiency (V Output current on Vcc Input voltage on V 100 2.7V 70 3.0V 65 3.3V (Linear) 3.6V (Linear Figure 13: DC – DC Converter Efficiency (V Output current on Vcc Input voltage ...
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... CC through 33 Ω For output high, shorted to ground through 33 Ω pF, 10 90%. For I/OUC, AUX1UC, AUX2UC Output stable for > 200 ns For pins IOUC, AUX1UC, AUX2UC when 73S8023C Data Sheet Min Typ Max Unit 0.1 ...
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... Data Sheet Symbol Parameter Reset and Clock for card interface, RST, CLK V Output level, high OH V Output level, low OL Output voltage when outside V INACT of a session I Output current limit, RST RST_LIM I Output current limit, CLK CLK_LIM Output rise time, fall time ...
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... I/O, AUX1, AUX2 = high DD Step up mode, ICC = 0 I/O, AUX1, AUX2 = high PWRDN = 1, in Start/stop bit = 0 DD All digital inputs driven with a true logical Condition No external resistor on VDDF_ADJ 73S8023C Data Sheet Min Typ Max Unit -0 MHz 48 52 ...
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... Data Sheet 13 Mechanical Drawing (32-QFN TOP VIEW 0.2 MIN. 0.35 / 0.45 Figure 14: 32-QFN Mechanical Drawing 24 / 0.85 NOM. 0.9MAX. SIDE VIEW 3.0 / 3.75 CHAMFERED 0.18 / 0.3 1.5 / 1.875 0.25 0.5 BOTTOM VIEW DS_8023C_019 0.00 / 0.005 0.20 REF. SEATING PLANE 0.30 Rev. 1.5 ...
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... Package Pin Designation (32-QFN) Use handling procedures necessary for a static sensitive component. GND LIN VDD NC PRDWN PRES PRES CS Rev. 1 TERIDIAN 73S8023C (Top View) Figure 15: 32-QFN 73S8023C Pin Out 73S8023C Data Sheet 24 XTALOUT 23 XTALIN 22 OFF GND 21 20 VDD 19 RSTIN 18 CMDVCC 17 VDDF_ADJ 25 ...
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... Part Description 73S8023C-QFN 32-pin Lead-Free QFN 73S8023C-QFN 32-pin Lead-Free QFN Tape / Reel 16 Related Documentation The following 73S8023C documents are available from Teridian Semiconductor Corporation: 73S8023C Data Sheet (this document) 73S8023C QFN Demo Board User’s Guide 17 Contact Information For more information about Teridian Semiconductor products or to check the availability of the ...
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... Teridian Semiconductor Corp., 6440 Oak Canyon Rd., Suite 100, Irvine, CA 92618 TEL (714) 508-8800, FAX (714) 508-8877, http://www.Teridian.com Rev. 1.5 73S8023C Data Sheet 27 ...