ADV7162KS140 Analog Devices Inc, ADV7162KS140 Datasheet - Page 14

• Manufacturer Part Number: ADV7162KS140
• Description: IC DAC VIDEO COLOR 96BIT 160MQFP
• Manufacturer: Analog Devices Inc
• Type: Video DACr

Specifications of ADV7162KS140

• Rohs Status: RoHS non-compliant
• Applications: HDTV
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP

ADV7160/ADV7162
Mnemonic
SYNCOUT
TRISYNC
D9–D0
ODD/EVEN
CE
R/W
C0, C1
IOR, IOG, IOB
V
R
COMP
V
GND:
TMS, TCK,
TDI, TDO
REF
SET
AA
Alternatively, R
Function
Composite-Sync Output (TTL Compatible Output). This video output is a delayed version of
SYNC. The delay corresponds to the number of pipeline stages of the device.
Composite-Sync HDTV Control (TTL Compatible Output). This video input is enabled using Bit
CR17 in Command Register 1. When TRISYNC is low, any DAC output which has Sync enabled,
goes to the tri-sync level. As with the SYNC input, it should only be activated while BLANK is low.
Data Bus (TTL Compatible Input/Output Bus). Data, including color palette values and device con-
trol information is written to and read from the device over this 10-bit, bidirectional databus. 10-bit
data or 8-bit data can be used. The databus can be configured for either 10-bit parallel data or byte
data (8+2) as well as standard 8-bit data. Any unused bits of the data bus should be terminated
through a resistor to either the digital power plane (V
Odd/Even Control (TTL Compatible Input). This input indicates which field of the frame is being
displayed. It is required to ensure proper operation of the ADV7160/ADV7162 cursor when inter-
laced display mode is selected. It is ignored when noninterlaced display mode is selected. This input
should change only during the vertical blank period. It is assumed that an odd field will always follow
an even field and vice versa.
Chip Enable (TTL Compatible Input). This input must be at Logic “0” when writing to or reading
from the device over the data bus (D0–D9). Internally, data is latched on the rising edge of CE.
Read/Write Control (TTL Compatible Input). This input determines whether data is written to or
read from the device’s registers and color palette RAM. R/W and CE must be at Logic “0” to write
data to the part. R/W must be at Logic “1” and CE at Logic “0” to read from the device.
Command Controls (TTL Compatible Inputs). These inputs determine the type of read or write op-
eration being performed on the device over the data bus, (see Interface Truth Table). Data on these
inputs is latched on the falling edge of CE.
Red, Green & Blue Current Outputs (High Impedance Current Sources). These RGB video outputs
are specified to directly drive RS-343A and RS-170 video levels into doubly terminated 75
Voltage Reference Input (Analog Input): An external 1.235 V voltage reference is required to drive
this input. An AD589 (2-terminal voltage reference) or equivalent is recommended. (Note: It is not
recommended to use a resistor network to generate the voltage reference.)
Output Full Scale Adjust Control (Analog Input). A resistor connected between this pin and analog
ground controls the absolute amplitude of the output video signal. For a value of R
280 , with 37.5
Gain as shown, the required Video Standard can be achieved.
Compensation Pin. A 0.1 F capacitor should be connected between this pin and V
Power Supply (+5 V
together to one common +5 V filtered analog power supply.
Analog Ground. The part contains multiple ground pins, all should be connected together to the
system’s ground plane.
These four pins control the JTAG test access port.
See Appendix 6 for more detail
CR44
0
0
1
1
CR43
0
1
0
1
SET
can be calculated by the following equation:
termination and using CR43 and CR44 of Command Register 4 to set the DAC
5%). The part contains multiple power supply pins, all should be connected
Video Standard
RS343A, Sync & Pedestal
RS343A, Sync & No Pedestal
RS343A, No Sync & No Pedestal
RS170, Sync & Pedestal
–14–
R
SET
Black to White Current
DAC Gain V
CC
) or GND.
REF
DAC Gain
3996
4224
4311
5592
Black to White
660 mV 17.62 mA
699 mV 18.63 mA
714 mV 19.05 mA
925 mV 24.67 mA
SET
AA
.
of nominally
loads.
REV. 0