MAX4357 Maxim, MAX4357 Datasheet - Page 38

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MAX4357

Manufacturer Part Number
MAX4357
Description
The MAX4357 is a 32 x 16 highly integrated video crosspoint switch matrix with input and output buffers
Manufacturer
Maxim
Datasheet

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32 x 16 Nonblocking Video Crosspoint Switch
with I/O Buffers
The MAX4357 operates from a single +5V or dual ±3V
to ±5V supplies. For single-supply operation, connect
all V
pins with a 0.1µF capacitor to ground. For dual-supply
systems, bypass all supply pins to ground with 0.1µF
capacitors.
T
supplies down to ±3V or a single supply of +5V.
Operating at the minimum supply voltages reduces the
power dissipation by as much 40% to 50%. At +5V, the
MAX4357 consumes 220mW (0.43mW/point).
The MAX4357 output buffers can be programmed to
either A
typically used when driving short-length (less than
3cm), high-impedance "local" PC-board traces. To
drive a cable or a 75Ω transmission line trace, program
the gain of the output buffer to +2V/V and place a 75Ω
resistor in series with the output. The series termination
resistor and the 75Ω load impedance act as a voltage
divider that divides the video signal in half. Set the gain
to +2V/V to transmit a standard 1V video signal down a
cable. The series 75Ω resistor is called the back-match,
reverse termination, or series termination. This 75Ω
resistor reduces reflections and provides isolation,
increasing the output-capacitive-driving capability.
The MAX4357’s unique digital interface simplifies pro-
gramming multiple MAX4357 devices in an array.
Multiple devices are connected with DOUT of the first
device connecting to DIN of the second device, and so
on (Figure 9). Two distinct programming modes,
38
Table 7. 7-Bit Serial Control Word Bit Assignments (Mode 1: Complete Matrix Mode
Programming)
he MAX4357 has been designed to operate with split
Driving a PC-Board Interconnect or Cable
6 (MSB)
0 (LSB)
______________________________________________________________________________________
EE
BIT
5
4
3
2
1
V
pins to ground and bypass all power-supply
= +1V/V or +2V/V. The +1V/V configuration is
Input Address 4
Input Address 3
Input Address 2
Input Address 1
Input Address 0
Output Enable
Gain Set
Power-Supply Bypassing
Power in Large Systems
NAME
(A
Matrix Programming
V
= +1V/V or +2V/V)
Enable bit for output, 0 = disable, 1 = enable.
Gain select for output buffer, 0 = gain of +1V/V, 1 = gain of +2V/V.
MSB of input channel select address
MSB of input channel select address
MSB of input channel select address
MSB of input channel select address
LSB of input channel select address
Individual Output Address Mode (MODE = 0) and
Complete Matrix Mode (MODE = 1) are selected by
toggling a single MODE control pin high or low. Both
modes operate with the same physical board layout.
This allows initial programming of the IC by daisy-
chaining and sending one long data word while still
being able to immediately address and update individ-
ual locations in the matrix.
In Individual Output Address Mode, the devices are
connected in a serial-bus configuration, with the data
routing gate (Figure 3) connecting DIN to DOUT, mak-
ing each device a virtual node on the serial bus. A sin-
gle 16-bit control word is sent to all devices
simultaneously. Only the device with the corresponding
chip address responds to the programming word and
updates its output. In this mode, the chip address is set
via hardware pin strapping of A3–A0. The host commu-
nicates with the device by sending a 16-bit word con-
sisting of 1 don’t care bit, 4-chip address bits, 11 bits of
data to make the word exactly two bytes in length. The
11 data bits are broken down into 4 bits to select the
output to be programmed; 1 bit to set the output
enable; 1 bit to set gain; and 5 bits to select the input to
be connected to that output. In this method, the matrix
is programmed one output at a time.
In Complete Matrix Mode, the devices are connected in
a daisy-chain fashion where n
program the entire matrix, where n = the number of
MAX4357 devices connected in series. The data word
is structured such that the first bit is the LSB of the last
device in the chain and the last data bit is the MSB of
the first device in the chain. The total length of the data
word is equal to the number of crosspoint devices to be
FUNCTION
Individual Output Address Mode
Complete Matrix Mode (Mode = 1)

112 bits are sent to
(Mode = 0)

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