TMPM382FWFG Toshiba, TMPM382FWFG Datasheet - Page 403

• Manufacturer Part Number: TMPM382FWFG
• Manufacturer: Toshiba

Specifications of TMPM382FWFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 12K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

14 SSP (Synchronous Serial Port)
14.1 Block Diagram
INTSSP0
INTSSP1
SP1 transmission (DMA clear)
SP1 reception (DMA request: single)
SP1 reception (DMA request: burst)
SP1 transmission (DMA request: burst)
SP1 reception (DMA clear)
SP0 reception (DMA clear)
SP0 transmission (DMA clear)
SP0 reception (DMA request: single)
SP0 reception (DMA request: burst)
SP0 transmission (DMA request: burst)
fsys
fsys
Interrupt request
Bus interface
prescaler
register
Clock
and
interface
TMPM380/M382 - 2 / 28 -
Write data
Read data
DMA
[15:0]
[15:0]
SSPCLKDIV
Tx/Rx param
16bit × 8
Transmit
16bit × 8
Receive
FIFO
FIFO
Interrupt request
DMA transfer request
Reception buffer processing
Overrun
Timeout
request
Transmission
buffer processing
request
RXD [15:0]
TXD [15:0]
SSP channel 0
SSP channel 1
reception logic
Transmission/
FIFO status
generation
interrupt
and
TMPM380/M382
SP0DI
SP0DO
SP1DI
SP1DO
SP0CLK
SP0FSS
SP1CLK
SP1FSS