IRMCK341 International Rectifier, IRMCK341 Datasheet
IRMCK341
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IRMCK341 Summary of contents
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... CMOS Description IRMCK341 is a high performance OTP based motion control IC designed primarily for appliance applications. IRMCK341 is designed to achieve low cost and high performance control solutions for advanced inverterized appliance motor control. IRMCK341 contains two computation engines. One is Motion Control Engine (MCE magnet motors ...
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... Overview ....................................................................................................................................5 2 IRMCK341 Block Diagram and Main Functions.........................................................................6 3 Pinout.........................................................................................................................................8 4 Input/Output of IRMCK341.........................................................................................................9 4.1 8051 Peripheral Interface Group .......................................................................................10 4.2 Motion Peripheral Interface Group ....................................................................................11 4.3 Analog Interface Group .....................................................................................................11 4.4 Power Interface Group ......................................................................................................12 4.5 Test Interface Group .........................................................................................................12 5 Application Connections .......................................................................................................... Characteristics ...................................................................................................................14 6.1 Absolute Maximum Ratings...............................................................................................14 6.2 System Clock Frequency and Power Consumption ..........................................................14 6 ...
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... Figure 1. Typical Application Block Diagram Using IRMCK341.....................................................5 Figure 2. IRMCK341 Internal Block Diagram.................................................................................6 Figure 3. IRMCK341 Pin Configuration..........................................................................................8 Figure 4. Input/Output of IRMCK341 .............................................................................................9 Figure 5. Application Connection of IRMCK341 ..........................................................................13 Figure 6. Clock Frequency vs. Power Consumption....................................................................14 Figure 7 Crystal oscillator circuit..................................................................................................18 Figure 8 Voltage droop of sample and hold .................................................................................19 Figure 9 SYNC to SVPWM and A/D Conversion AC Timing .......................................................20 Figure 10 GATEKILL to SVPWM AC Timing ...
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... Table 12. GATEKILL to SVPWM AC Timing ...............................................................................21 Table 13. Interrupt AC Timing......................................................................................................21 2 Table 14 Timing ..............................................................................................................22 Table 15. SPI Write AC Timing ....................................................................................................23 Table 16. SPI Read AC Timing....................................................................................................24 Table 17. UART AC Timing .........................................................................................................25 Table 18. CAPTURE AC Timing ..................................................................................................26 Table 19. JTAG AC Timing ..........................................................................................................27 Table 20. OTP Programming Timing ...........................................................................................28 Table 21. Pin List .........................................................................................................................34 www.irf.com TABLE OF TABLES 4 IRMCK341 © 2007 International Rectifier ...
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... The MCE consists of a collection of control elements, motion peripherals, a dedicated motion control sequencer and dual port RAM to map internal signal nodes. IRMCK341 also employs a unique single shunt current reconstruction circuit to eliminate additional analog/digital circuitry and enables a direct shunt resistor interface to the IC. Motion control programming is achieved using a ...
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... JTAG Debugger 120MHz 2 Crystal PLL (4MHz) Figure 2. IRMCK341 Internal Block Diagram IRMCK341 contains the following functions for sensorless AC motor control applications: • Motion Control Engine (MCE o Proportional plus Integral block o Low pass filter o Differentiator and lag (high pass filter) o Ramp o Limit ...
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... UART C/SPI port o 64K byte program OTP o 2K byte data RAM. Note 1: Total size of RAM is 8K byte including MCE program, MCE data, and 8051 data. Different sizes can be allocated depending on applications. www.irf.com Note 1 Note 1 7 IRMCK341 © 2007 International Rectifier ...
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... Pinout www.irf.com Figure 3. IRMCK341 Pin Configuration 8 IRMCK341 © 2007 International Rectifier ...
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... Input/Output of IRMCK341 All I/O signals of IRMCK341 are shown in Figure 4. All I/O pins are 3.3V logic interface except A/D interface pins. XTAL0 Crystal XTAL1 UART P1.2/TXD Interface P1.1/RXD I2C SDA/CS0 Interface SCL/SO-SI/VPP & OTP power P1.0/T2 P1.3/SYNC/SCK P1.4/CAP P1.5 P1.6 P1.7 P2.0/NMI Discrete I/O P2.1 P2.2 P2.3 P2.4 P2.5 P3.0/INT2/CS1 P3.2/INT0 P3.3/INT1 P3.5/T1 System Reset RESET TCK P5 ...
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... Peripheral Interface Group UART Interface TXD Output, Transmit data from IRMCK341 RXD Input, Receive data to IRMCK341 Discrete I/O Interface P1.0/T2 Input/output port 1.0, can be configured as Timer/Counter 2 input P1.1/RXD Input/output port 1.1, can be configured as RXD input P1.2/TXD Input/output port 1.2, can be configured as TXD output P1.3/SYNC/SCK Input/output port 1.3, can be configured as SYNC output or SPI clock output P1 ...
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... Input, Analog input channel 4 (0 – 1.2V), needs to be pulled down to AVSS if unused www.irf.com 2 C clock output, or SPI data 2 C Data line or SPI chip select clock output, or SPI data or OTP programming power 2 C data line or SPI chip select 0 11 IRMCK341 © 2007 International Rectifier ...
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... TSTMOD Must be tied to VSS, used only for factory testing. P5.1/TSM Input/output port 5.1, configured as JTAG port by default P5.2/TDO Input/output port 5.2, configured as JTAG port by default P5.3/TDI Input/output port 5.3, configured as JTAG port by default TCK Input, JTAG test clock www.irf.com © 2007 International Rectifier 12 IRMCK341 ...
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... Application Connections Typical application connection is shown in Figure 5. All components necessary to implement a complete sensorless drive control algorithm are shown connected to IRMCK341. Figure 5. Application Connection of IRMCK341 www.irf.com © 2007 International Rectifier 13 IRMCK341 ...
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... Table 1. Absolute Maximum Ratings Min Typ Table 2. System Clock Frequency Power Consumption 1.8V 3.3V Total Power MCE Frequency (MHz) 14 IRMCK341 Max Condition 3.6 V Respect to VSS 1.98 V Respect to VSS 7.0V Respect to VSS 1.98 V Respect to AVSS 3.65 V Respect to VSS 85 ˚C 150 ˚C Max Unit 128 MHz 32 ...
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... P5.2/TDO, P5.3/TDI, GATEKILL, PWMUL, PWMUH, PWMVL, PWMVH, PWMWL, and PWMWH pins. www.irf.com Min Typ 3.0 V 3.3 V 1.62 V 1.8 V 6.5V 6.75V -0 2 3.6 pF ±10 nA 8.9 mA 13.2 mA 12.4 mA 24.8 mA 17.9 mA 26.3 mA 24.6 mA 49.5 mA Table 3. Digital I/O DC Characteristics 15 IRMCK341 Max Condition 3.6 V Recommended 1.98 V Recommended 7.0V Recommended 0.8 V Recommended 3.6 V Recommended (1) - ±1 μ 2.4 V ...
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... V - PLLVSS 0.8* V PLLVDD Table 4. PLL DC Characteristics Min Typ 1. ( kΩ 100 μA Table 5. Analog I/O DC Characteristics 16 IRMCK341 Max Condition 1.92 V Recommended 0. 1.8 V PLLVDD (1) V PLLVDD 1.8 V PLLVDD PLLVDD (1) Max Condition 1.89 V Recommended 1.8 V AVDD 1.2 V Recommended 1 1.8 V AVDD ...
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... Ratio Note: (1) Data guaranteed by design. www.irf.com Min Typ 1.53 V 1.66 V 1. Table 6. UVcc DC Characteristics Min Typ 495 mV 600 mV -0. Table 7. AREF DC Characteristics 17 IRMCK341 Max Condition 1. 3.3 V DD1 1. 3.3 V DD1 - Max Condition 700 1.8 V AVDD (1) - (1) - © 2007 International Rectifier ...
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... MHz 4 MHz 32 MHz 50 MHz F ÷ 256 - CLKIN - 200 psec - Table 8. PLL AC Characteristics R = =10 Xtal 2 C =30PF 1 C =30PF 2 Figure 7 Crystal oscillator circuit 18 IRMCK341 Max Condition (1) 60 MHz (see figure below) (1) 128 MHz (1) - (1) - (1) - (1) 500 μsec © 2007 International Rectifier ...
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... Note: (1) Data guaranteed by design. www.irf.com Min Typ - - - - Voltage droop t SAMPLE T HOLD Min Typ - 10 V/μsec Ω - 400 ns 19 IRMCK341 Max Condition (1) 2.05 μsec 10 μsec Voltage droop ≤ 15 LSB (see figure below) S/H Voltage Max Condition - AVDD ( ( 1 AVDD ( ...
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... SYNC to PWM output dSYNC3 delay time Note: (1) AIN1 through AIN6 channels are converted once every 6 SYNC events www.irf.com t wSYNC t dSYNC1 t dSYNC2 t dSYNC3 Min Typ - Table 11. SYNC AC Characteristics 20 IRMCK341 Max Unit - SYSCLK 100 SYSCLK 200 SYSCLK (1) 2 SYSCLK © 2007 International Rectifier ...
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... Unless specified 25˚C. Symbol Parameter t INT0, INT1 Interrupt wINT Assertion Time t INT0, INT1 latency dINT www.irf.com Min Typ Figure 11 Interrupt AC Timing Min Typ Table 13. Interrupt AC Timing 21 IRMCK341 Max Unit - SYSCLK 100 SYSCLK Max Unit - SYSCLK 4 SYSCLK © 2007 International Rectifier ...
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... C read setup time is determined by the programmable filter time applied to I communication. www.irf.com T T I2CLK I2CLK I2WSETUP I2WHOLD I2RSETUP 2 Figure Timing Min Typ 10 0.25 0.25 0.25 0. filter time 1 2 Table 14 Timing 22 IRMCK341 t I2EN1 t I2RHOLD t I2EN2 Max Unit - 8192 SYSCLK - - T I2CLK - - T I2CLK - - T I2CLK - - T I2CLK - - SYSCLK - ...
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... CS high time between two CSHIGH consecutive byte transfer t CS hold time CSHOLD www.irf.com Figure 13 SPI Write AC Timing Min Typ 1 Table 15. SPI Write AC Timing 23 IRMCK341 Max Unit - SYSCLK - T SPICLK - T SPICLK 10 nsec 10 nsec - T SPICLK - T SPICLK © 2007 International Rectifier ...
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... CS high time between two CSHIGH consecutive byte transfer t CS hold time CSHOLD www.irf.com Figure 14 SPI Read AC Timing Min Typ 1 Table 16. SPI Read AC Timing 24 IRMCK341 Max Unit - SYSCLK - T SPICLK - T SPICLK 10 nsec - nsec - nsec - T SPICLK - T SPICLK © 2007 International Rectifier ...
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... Each bit including start and stop bit is sampled three times at center of a bit at an interval of 1/ three sampled values do not agree, then UART noise error is generated. BAUD www.irf.com Data and Parity Bit Stop Bit T UARTFIL Figure 15 UART AC Timing Min Typ - 57600 - 1/16 Table 17. UART AC Timing 25 IRMCK341 Max Unit - bit/sec - T BAUD © 2007 International Rectifier ...
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... CAPTURE rising edge CLDELAY to capture register latch time t CAPTURE input INTDELAY interrupt latency time www.irf.com Figure 16 CAPTURE Input AC Timing Min Typ Table 18. CAPTURE AC Timing 26 IRMCK341 Max Unit - SYSCLK - SYSCLK - SYSCLK 4 SYSCLK 4 SYSCLK 4 SYSCLK © 2007 International Rectifier ...
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... TCK Low Period JLOW t TCK to TDO propagation CO delay time t TDI/TMS setup time JSETUP t TDI/TMS hold time JHOLD www.irf.com t JHOLD Figure 17 JTAG AC Timing Min - Table 19. JTAG AC Timing 27 IRMCK341 Typ Max Unit - 50 MHz - - nsec - - nsec - 5 nsec - - nsec - - nsec © 2007 International Rectifier ...
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OTP Programming Timing Figure 18 OTP Programming Timing Unless specified 25˚C. Symbol Parameter T VPP Setup Time VPS T VPP Hold Time VPH Rev 1.0 Min 10 15 Table 20. OTP Programming Timing Typ Max Unit - ...
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... Internal digital circuit PIN Figure 19 All digital I/O except motor PWM output The following figure shows RESET and GATEKILL I/O structure. www.irf.com VDD1 (3.3V) 70k Low true logic 6.0V 100 6.0V VSS VDD1 (3.3V) RESET GATEKILL I/O 6.0V PIN 100 6.0V VSS Figure 20 RESET, GATEKILL I/O 29 IRMCK341 70k © 2007 International Rectifier ...
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... The following figure shows the VPP pin I/O structure www.irf.com AVDD Analog input 6.0V PIN 100 Analog Circuit 6.0V AVSS Figure 21 Analog input 1.8V Analog output 6.0V PIN Analog Circuit 6.0V AVSS VPP input PIN 100 Analog Circuit 8.0V VSS Figure 23 VPP programming pin 30 IRMCK341 © 2007 International Rectifier ...
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... The following figure shows the VDD1, VDD2, AVDD and PLLVDD pin structure Figure 25 VDD1, VDD2, AVDD and PLLVDD pin structure The following figure shows the XTAL0 and XTAL1 pins structure www.irf.com 6.0V PIN Figure 26 XTAL0/XTAL1 pins structure 31 IRMCK341 VDD1 6.0V VSS © 2007 International Rectifier ...
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... Analog input channel 1, 0-1.2V range, needs to be pulled down to AVSS if unused O Unbuffered 0.6V output. Capacitor needs to be connected. O Analog reference voltage output (0.6V) I Single shunt current sensing OP amp input (-) I Single shunt current sensing OP amp input (+) O Single shunt current sensing OP amp output 32 IRMCK341 © 2007 International Rectifier ...
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... C clock output (open drain, need pull up) or SPI data or OTP power supply for programming 2 I data (open drain, need pull up) or SPI Chip Select 0 I/O JTAG test mode select I/O JTAG test data output I/O JTAG test data input I JTAG test clock 33 IRMCK341 © 2007 International Rectifier ...
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... TSTMOD 62 RESET 63 PLLVDD 64 PLLVSS www.irf.com Internal Pin Pull-up Type Description /Pull-down 58 kΩ pull I Test mode. Must be tied to VSS. Factory use only down I/O Reset, low true, Schmitt trigger input P 1.8V PLL power P PLL ground Table 21. Pin List 34 IRMCK341 © 2007 International Rectifier ...
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... Package Dimensions This document is the property of International Rectifier and may not be copied or distributed without expressed consent. IRMCK341 ...
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... This document is the property of International Rectifier and may not be copied or distributed without expressed consent. This product has been designed and qualified for the industrial level Qualification standards can be found at Data and specifications subject to change without notice. 12/25/2007 IRMCK341 The LQFP-64 is MSL3 qualified www.irf.com <http://www.irf.com> ...