TLE 8261E Infineon Technologies, TLE 8261E Datasheet - Page 53

• Manufacturer Part Number: TLE 8261E
• Manufacturer: Infineon Technologies

Specifications of TLE 8261E

• Packages: PG-DSO-36
• Transceiver: High Speed CAN ISO 11898 - 5
• Voltage Regulator Output: 2 x 200 mA + 400 mA
• Watchdog: Standard and Window Watchdog
• Quiescent Current (max.): 28 ?A (typ) Sleep Mode (5V on)
• Standby Current: 58 ?A (typ) Stop Mode (5V on)

11.2
Figure 26
INT pin is released after a SPI interrupt buffer read out command, that is performed with a Read Only command
(111) to register (000). In case consecutive interrupt sources are indicated before the SPI read out, only one INT
LOW will be raised but the SPI read out will indicate the interrupt sources. A time-out feature is implemented. The
INT pin can be active LOW only for the time
valid or present in the SPI register. Between two activations of the INT, there is at least a delay of t
interrupt occurs in the meantime, the information is stored and the INT will go LOW after
is at minimum t
Figure 26
11.3
The interrupt function is possible only in SBC Normal and Stop Mode.
After an SBC Restart Mode, all interrupt sources are enabled.
11.4
By default, all interrupt sources are activated. Please refer to the dedicated chapter for the definition of the
interrupt.
The INT output is active for at least
the interrupt event occurs.
If no SPI read is done after the interrupt is generated (INT pin low) the INT output becomes active (INT pin high)
again after
If two interrupt cases occur after each other and the SPI read (with read-only) is done after the second interrupt
case, both interrupt bits are cleared. Although the interrupt bits for both interrupt cases are cleared the second
interrupt will be issued by INT pin Low. This can lead to an interrupt where all interrupt bits are read as “0”.
Data Sheet
interrupt source 2
interrupt source 1
INT output
illustrates the interrupt timing. The INT output is set LOW as soon as an interrupt condition occurs. The
inactive
inactive
active
active
t
INTTO
Interrupt Timing
Interrupt Timing
Interrupt Modes with SBC Modes
Interrupt Application Information
INT
.
.
SPI read out
t
INT
t
INT TO
SPI read out
t
INT
, even if the corresponding interrupt register is read out immediately after
t
INTTO
. Afterwards, the INT pin is released but the INT source is still
SPI read out
t
53
INTTO
t
INTTO
t
INTTO
SPI read out
t
INTO
Rev. 1.0, 2009-03-31
. The INT pulse width
Interrupt Function
t
t
t
interupt timing.vsd
TLE8261E
INTTO
. If an