TLE 8201R Infineon Technologies, TLE 8201R Datasheet
TLE 8201R
Specifications of TLE 8201R
Related parts for TLE 8201R
TLE 8201R Summary of contents
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... Type TLE 8201R Functional Description The TLE 8201R is an Application Specific Standard Product for automotive door-module applications. It includes all the power stages necessary to drive the loads in a typical front door application, i.e. central lock, deadlock or mirror fold, mirror position, mirror defrost and 5W or 10W lamps, e.g for turn signal, courtesy/warning or control panel illumination. ...
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... Protection and Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.4.2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.5 Power-Output 7 (Mirror heater driver 4.5.1 Protection and Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 4.5.2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 4.6 Power-Outputs (Lamp drivers 4.6.1 Protection and Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4.6.2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 4.7 Logic In- and Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 4.7.1 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5 Application Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Data Sheet Rev. 2 TLE 8201R Page 2006-06-07 ...
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... ISO sense MUX OUT8 OUT9 OUT10 OUT11 Figure 1 Block Diagram Data Sheet Rev. 2 Charge- pump Biasing RevPol MOS driver Fault- Detect SPI Logic and Latch Logic IN current GND 3 TLE 8201R Block Diagram OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 2006-06-07 ...
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... CLK 11 CSN OUT1 16 OUT1 17 GND 18 Figure 2 Pin Configuration PG-DSO-36-27 Data Sheet Rev. 2.0 cooling tab (GND) 36 GND 35 n.c. 34 OUT4 OUT7 31 OUT7 OUT8 28 OUT9 OUT10 24 OUT11 OUT3 21 OUT2 20 OUT2 19 GND 4 TLE 8201R Pin Configuration 2006-06-07 ...
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... SPI shift register. Has an internal pull down current source 12 CSN Serial Port Chip Select Not Input; SPI communication is enabled by pulling CSN to LOW. CLK must be LOW during the transition of CSN. The CSN-pin has an internal pull-up current source Data Sheet Rev. 2.0 5 TLE 8201R Pin Configuration 2006-06-07 ...
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... Vs is recommended 28 OUT9 Power-Output of high-side switch 9; DMOS high-side switch 29 OUT8 Power-Output of high-side switch 8; DMOS high-side switch 31, 32 OUT7 Power Output of high-side switch 7; DMOS high-side switch 34 OUT4 Power-Output of half-bridge 4; DMOS half-bridge 35 n.c. Not connected Data Sheet Rev. 2.0 6 TLE 8201R Pin Configuration 2006-06-07 ...
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... Limit Values Unit Remarks min -0.3 CC -0 -50 stg V – ESD – ESD 7 TLE 8201R Electrical Characteristics max – 5.5 V – 5.5 V – – S 150 C – 150 C – Human Body Model according to ANSI EOS\ESD S5.1 standard (eqv. to ...
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... 4.75 5 – 2 CLK T -40 150 j Symbol Limit Values Unit min. max. R – 1.5 thjC R – 50 thjA 8 TLE 8201R Electrical Characteristics Remarks V Including over- voltage lockout V Functional V Parameter Specification V – MHz – C – Conditions K/W – K/W minimal footprint 2006-06-07 ...
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... Sleep-Mode The TLE 8201R can be put in a low current-consumtion mode by setting the input INH to LOW. The INH pin has an internal pull-down current source. In sleep-mode, all output transistors are turned off and the SPI is not operating. When enabling the IC by setting INH from Power-On Reset is performed as described above ...
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... V; INH = High; all outputs open; CC Sym- Limit Values bol min. typ. I – – – – – lkGO 10 TLE 8201R Unit Conditions max. 2 INH = 0 OUT7- < – – – ...
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... V; INH = High; all outputs open; CC Sym- Limit Values bol min. typ. V – UVON V 4.0 UVOFF V – UVHY V 21 OVOF OVON V 0.5 OVHY 11 TLE 8201R V , all output UV OFF V , the power all output OV OFF Unit Conditions max. V – 5.2 V increasing S V – 5.0 V decreasing S V 0.25 – ...
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... V; INH = High; all outputs open; CC Sym- Limit Values bol min. typ. T 120 jW T – T 150 jSD T 120 jSO T – 1.05 jSD TLE 8201R Unit Conditions max. 145 170 C – 30 – K – 175 200 C – – 170 C – 30 – K – 1.20 – – – ...
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... V 0 ISO12 k – ILIS12 k – ILISacc ILIS1 ISO34 k – ILIS34 k – ILISacc V 0 ISO7 k – ILIS7 k – ILISacc 13 TLE 8201R Unit Conditions max. V – 2000 – – = ILIS I > – OUT ILIS12 k - ILIS2 V – ...
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... SPI 4.3.1 General The SPI is used for bidirectional communication with a control unit. The TLE 8201R acts as SPI-slave and the control unit acts as SPI-master. The 16-bit control word is read via the DI serial data input. The status word appears synchronously at the DO serial data output. The communication is synchronized by the serial clock input CLK. ...
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... For Status Register address handling, please refer to CSN bit DI Data for selected register address DO Data from selected register address Figure 4 SPI structure Data Sheet Rev. 2 Input data output data 15 TLE 8201R Section 4.3 Register generic data Address generic data 2006-06-07 time ...
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... HS10ON Testmode HS11ON Address - independent data IS_2 IS_2 IS_1 IS_1 IS_0 IS_0 SRR SRR Address - bits RA_1 = 0 RA_1 = 1 RA_0 = 1 RA_0 = 0 16 TLE 8201R CtrlReg 11 PWM2 input select HS7sel2 HS8sel2 HS9sel2 HS10sel2 HS11sel2 LS1sel2 LS2sel2 LS3sel2 OpL89ON OpL1011ON IS_2 IS_1 IS_0 SRR ...
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... Register Address, selects the control-register address for the current SPI transmission and the status-register address for the next SPI transmission Data Sheet Rev. 2.0 IS_1 IS_0 Power stage selected for current sense 0 0 HS1 0 1 HS2 1 0 HS3 1 1 HS4 0 0 HS7 no output selected ( 17 TLE 8201R ISO 2006-06-07 ...
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... HS10OvL n.c. HS11OvL Address - independent data PSF PSF TSD TSD TW TW Error Flags EF_11 EF_11 EF_10 EF_01 EF_00 EF_00 18 TLE 8201R StatReg 11 Mirror and Lamp- driver open load valid for input data LS4OpL n.c. LS5OpL n.c. LS6OpL n.c. HS8OpL HS9OpL HS10OpL HS11OpL PSF TSD ...
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... EF_xy Error Flag for StatReg xy. Set to HIGH if any bit is set to HIGH StatReg xy n.c. not connected. These bits may be used for test-mode purposes. They are set to fixed LOW in normal operation Data Sheet Rev. 2.0 19 TLE 8201R 2006-06-07 ...
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... Data Sheet Rev. 2 Status Register 01 is transferred to Status Register 10 is transferred to SPI master, but not reset after transmission 20 TLE 8201R Figure StatReg10 is reset after CSN L-> SPI master, and reset after ...
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... EF bit15 bit14 EF V < 5.25 V; INH = High; all outputs open; CC Sym- Limit Values bol min. typ. t 100 lead t 100 lag t – – TLE 8201R Figure 6. bit13 bit12 Z Unit Conditions max. 1) – – – – – – ...
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... – DOsetup t 50 DOhold t 5 nodata f – CL – MSB 7 MSB 22 TLE 8201R Unit Conditions max. 1) – – – – – – – and 8 1) – – – – – ...
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... CLK P DO xsel1 I xsel2 PWM1 1 PWM2 1 Figure 8 PWM input and SPI control registers Data Sheet Rev. 2.0 xON x {LS1, LS2, LS3, HS7, HS8, HS9, & & >=1 & control logic of power transistor x 23 TLE 8201R HS10, HS11} Gate driver power transistor x 2006-06-07 OUT x ...
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... Truth-table for PWM inputs xON xsel1 xsel2 Data Sheet Rev. 2.0 PWM1 PWM2 power stage OFF OFF OFF OFF 24 TLE 8201R 2006-06-07 ...
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... Instead, both switches are turned OFF and the Over-Load bit is set High for both switches (e.g. LS1OvL = H and HS1OvL = H). Data Sheet Rev. 2 the output transistor is turned off and the dSD TLE 8201R I for longer dSD t 2006-06-07 as ...
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... Diagnostic information motor motor connected disconnected LS1 LS2 LS1 OpL OpL OpL TLE 8201R t , the dOC Table 5 Open Load Remark on Open Load Detection LS2 OpL 0 not detectable 0 detected 1 detected 0 not detectable 1 not detectable. 2006-06-07 ...
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... DHL12 t 3 DLH12 I 8 SD12 t 10 dSD12 I – SC12 I 40 OCD12 t 200 dOC12 I – TLE 8201R Unit Conditions max. I – 150 OUT – 260 OUT V 50 100 resistive load ...
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... DHL34 t 3 DLH34 I 3 SD34 t 10 dSD34 I – SC34 I 12 OCD34 t 200 dOC34 I – TLE 8201R Unit Conditions max. I – 0 OUT – 0 OUT V 50 100 resistive load see 50 ...
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... DHL56 t 3 DLH56 I 1.25 SD56 t 10 dSD56 I – SC56 I 12 OCD56 t 200 dOC56 I – TLE 8201R Unit Conditions max. I – 0.8 = 0.5 A; OUT – 1.3 = 0.5 A OUT V 50 100 resistive load see 50 100 s Figure ...
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... Timing bridge outputs low to high Data Sheet Rev. 2.0 CSN OUTx t dO FFH OUTx CSN low-side OFF delay time OUTx t dO FFL high-side ON delay time OUTx TLE 8201R high-side OFF delay time 10% t DHL 90% low-side ON t delay time dO NL 90% t DLH 10% 2006-06-07 ...
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... Data Sheet Rev. 2 the output transistor is turned off and dSD The open load error bit is latched and can be reset OpL OpL 31 TLE 8201R t dSD OFF-state, the output OpL the voltage rises above this OpL 2006-06-07 ...
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... OpL7ON switch ON HS7 HS7OpL Filter Figure 14 Open load in OFF-state scheme Data Sheet Rev. 2.0 Gate driver 1 & TLE 8201R I OpL OUT 7 high-side switch 7 R Load + V OpL - 2006-06-07 ...
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... I 6.25 SD7 t 10 dSD7 I – SC7 I 100 OpL V 2 OpL t – dOC I – TLE 8201R Unit Conditions max – 100 = 2.5 A; OUT – 170 = 2.5 A OUT resistive load see ...
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... PWM PWM OUT7 Figure 15 Timing OUT 7 Data Sheet Rev. 2 ISE 90% 90 dON dOFF 10% 34 TLE 8201R t FALL 10% 2006-06-07 ...
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... OU T short to GND Figure 16 Short circuit protection during switch-on Data Sheet Rev. 2.0 . During the delay time, the current is limited to SD8 TLE 8201R t dSDon8 I and the voltage SD8 I SC8 t dSD on8 t 2006-06-07 the as ...
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... The open load error bit is latched and can be reset OpL OpL 36 TLE 8201R t dSD OFF-state, the output OpL the voltage rises above this OpL I for SD ...
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... OpLxON switch ON HSx HSxOpL Filter Figure 18 Open load in OFF-state scheme Data Sheet Rev. 2.0 Gate driver 1 & TLE 8201R I OpL OUT x high-side switch 7 R Load + V - OpL 2006-06-07 ...
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... I 1.8 SD8 V 1.5 SD8 I - SC8 t 125 dSDon8 t 10 dSD8 I 100 OpL8 V 2 OpL8 t – dOC8 I – TLE 8201R Unit Conditions max. I – 0.5 = +0.5 A; OUT – 0.8 = +0.5 A OUT resistive load see Figure 19 15 ...
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... PWM PWM OUT8-11 Figure 19 Timing OUT Data Sheet Rev. 2.0 t RISE 90% 90 dON dOFF 10% 39 TLE 8201R t FALL 10% 2006-06-07 ...
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... IL V 100 IHY I -50 ICSN I 10 Input C – DOH CC 1.0 V – DOL I -10 DOLK C 1) – TLE 8201R Unit Conditions max. V – rising IN V – – V falling IN – 600 mV – V – IINH V – rising IN V – ...
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... PWM2 ISO Rsense 700 OUT8 OUT9 OUT10 OUT11 Figure 20 Application example with two-motor (safety-) lock Data Sheet Rev. 2.0 47uF // <40V 2 x 100nF GO Vs GND 41 TLE 8201R Application Description 3.3nF CP OUT1 main lock M OUT2 safety-lock M OUT3 OUT4 mirror-x M OUT5 mirror-y M OUT6 OUT7 ...
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... PWM1 PWM2 ISO Rsense 700 OUT8 OUT9 OUT10 OUT11 Figure 21 Application example with mirror-fold Data Sheet Rev. 2.0 47uF // <40V 2 x 100nF GO Vs GND 42 TLE 8201R Application Description 3.3nF CP OUT1 main lock M OUT2 OUT3 M mirror fold OUT4 mirror-x M OUT5 M mirror-y OUT6 OUT7 ...
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... Infineon Internet Page “Products”: http://www.infineon.com/products. SMD = Surface Mounted Device Data Sheet Rev. 2.0 15.74 ±0.1 (Heatslug) 0.1 C 36x 0. Bottom View 15.9 ±0.1 A (Mold) 43 TLE 8201R Package Outlines ±0. 2.8 6.3 Heatslug (Mold) 0.95 ±0.15 14.2 ±0.3 0. Heatslug 1 13.7 -0.2 (Metal) Dimensions in mm 2006-06-07 GPS09181 ...
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... Life support devices or systems are intended to be implanted in the human body support and/or maintain and sustain and/or protect human life. If they fail reasonable to assume that the health of the user or other persons may be endangered. Data Sheet Rev. 2.0 44 TLE 8201R 2006-06-07 ...
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... Revision History TLE 8201R Revision History: Previous Version: Page Subjects (major changes since last revision) No changes Data Sheet Rev. 2.0 2006-06-07 Preliminary Data Sheet Rev. 1.0 45 TLE 8201R 2006-06-07 ...